<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25601">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/intel/x4x: Use parallel MP init<br><br>Untested<br><br>Change-Id: Id5a2729f5bf6b525abad577e63d7953ae6640921<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/northbridge/intel/x4x/Kconfig<br>M src/northbridge/intel/x4x/northbridge.c<br>2 files changed, 2 insertions(+), 21 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/25601/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig</span><br><span>index 087edad..0e1a20f 100644</span><br><span>--- a/src/northbridge/intel/x4x/Kconfig</span><br><span>+++ b/src/northbridge/intel/x4x/Kconfig</span><br><span>@@ -29,6 +29,7 @@</span><br><span>        select HAVE_LINEAR_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT</span><br><span>       select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT</span><br><span>     select SMM_TSEG</span><br><span style="color: hsl(120, 100%, 40%);">+       select PARALLEL_MP</span><br><span> </span><br><span> config CBFS_SIZE</span><br><span>   hex</span><br><span>diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c</span><br><span>index 52454cf..83357e7 100644</span><br><span>--- a/src/northbridge/intel/x4x/northbridge.c</span><br><span>+++ b/src/northbridge/intel/x4x/northbridge.c</span><br><span>@@ -162,26 +162,6 @@</span><br><span>  pci_write_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), D0F0_SMRAM, smram);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * Really doesn't belong here but will go away with parallel mp init,</span><br><span style="color: hsl(0, 100%, 40%);">- * so let it be here for a while...</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-int cpu_get_apic_id_map(int *apic_id_map)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-    unsigned int i;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Logical processors (threads) per core */</span><br><span style="color: hsl(0, 100%, 40%);">-     const struct cpuid_result cpuid1 = cpuid(1);</span><br><span style="color: hsl(0, 100%, 40%);">-    /* Read number of cores. */</span><br><span style="color: hsl(0, 100%, 40%);">-     const char cores = (cpuid1.ebx >> 16) & 0xf;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-  /* TODO in parallel MP cpuid(1).ebx */</span><br><span style="color: hsl(0, 100%, 40%);">-  for (i = 0; i < cores; i++)</span><br><span style="color: hsl(0, 100%, 40%);">-          apic_id_map[i] = i;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-     return cores;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> static struct device_operations pci_domain_ops = {</span><br><span>         .read_resources   = mch_domain_read_resources,</span><br><span>       .set_resources    = mch_domain_set_resources,</span><br><span>@@ -195,7 +175,7 @@</span><br><span> </span><br><span> static void cpu_bus_init(device_t dev)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-  initialize_cpus(dev->link_list);</span><br><span style="color: hsl(120, 100%, 40%);">+   bsp_init_and_start_aps(dev->link_list);</span><br><span> }</span><br><span> </span><br><span> static struct device_operations cpu_bus_ops = {</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25601">change 25601</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25601"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Id5a2729f5bf6b525abad577e63d7953ae6640921 </div>
<div style="display:none"> Gerrit-Change-Number: 25601 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>