<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25602">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/intel/pineview: Use parallel MP init<br><br>Untested.<br><br>Change-Id: I89f7d514d75fe933c3a8858da37004419189674b<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/northbridge/intel/pineview/Kconfig<br>M src/northbridge/intel/pineview/northbridge.c<br>2 files changed, 2 insertions(+), 21 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/25602/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig</span><br><span>index 047aa8b..9e5a1c1 100644</span><br><span>--- a/src/northbridge/intel/pineview/Kconfig</span><br><span>+++ b/src/northbridge/intel/pineview/Kconfig</span><br><span>@@ -30,6 +30,7 @@</span><br><span>    select RELOCATABLE_RAMSTAGE</span><br><span>  select INTEL_GMA_ACPI</span><br><span>        select SMM_TSEG</span><br><span style="color: hsl(120, 100%, 40%);">+       select PARALLEL_MP</span><br><span> </span><br><span> config BOOTBLOCK_NORTHBRIDGE_INIT</span><br><span>  string</span><br><span>diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c</span><br><span>index cf6c5ce..296127b 100644</span><br><span>--- a/src/northbridge/intel/pineview/northbridge.c</span><br><span>+++ b/src/northbridge/intel/pineview/northbridge.c</span><br><span>@@ -145,26 +145,6 @@</span><br><span>   pci_write_config8(dev_find_slot(0, PCI_DEVFN(0, 0)), SMRAM, smram);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * Really doesn't belong here but will go away with parallel mp init,</span><br><span style="color: hsl(0, 100%, 40%);">- * so let it be here for a while...</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-int cpu_get_apic_id_map(int *apic_id_map)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- unsigned int i;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Logical processors (threads) per core */</span><br><span style="color: hsl(0, 100%, 40%);">-     const struct cpuid_result cpuid1 = cpuid(1);</span><br><span style="color: hsl(0, 100%, 40%);">-    /* Read number of cores. */</span><br><span style="color: hsl(0, 100%, 40%);">-     const char cores = (cpuid1.ebx >> 16) & 0xf;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-  /* TODO in parallel MP cpuid(1).ebx */</span><br><span style="color: hsl(0, 100%, 40%);">-  for (i = 0; i < cores; i++)</span><br><span style="color: hsl(0, 100%, 40%);">-          apic_id_map[i] = i;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-     return cores;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> static void mch_domain_set_resources(device_t dev)</span><br><span> {</span><br><span>    struct resource *res;</span><br><span>@@ -196,7 +176,7 @@</span><br><span> </span><br><span> static void cpu_bus_init(device_t dev)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-  initialize_cpus(dev->link_list);</span><br><span style="color: hsl(120, 100%, 40%);">+   bsp_init_and_start_aps(dev->link_list);</span><br><span> }</span><br><span> </span><br><span> static struct device_operations cpu_bus_ops = {</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25602">change 25602</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25602"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I89f7d514d75fe933c3a8858da37004419189674b </div>
<div style="display:none"> Gerrit-Change-Number: 25602 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>