<p>Bora Guvendik has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25514">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/apollolake: Enable early mmc CMD0, CMD1 for GLK<br><br>In order to improve boot time via emmc, enable Intel common<br>code that sends CMD0 and CMD1 early in firmware.<br><br>Change-Id: Ib4e791607059d12b3f5692f6404cb9eb39d79f6d<br>Signed-off-by: Bora Guvendik <bora.guvendik@intel.com><br>---<br>M src/soc/intel/apollolake/Kconfig<br>M src/soc/intel/apollolake/Makefile.inc<br>A src/soc/intel/apollolake/early_mmc.c<br>M src/soc/intel/apollolake/include/soc/iomap.h<br>M src/soc/intel/apollolake/romstage.c<br>5 files changed, 75 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/25514/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig</span><br><span>index fcb1ef7..4ff3369 100644</span><br><span>--- a/src/soc/intel/apollolake/Kconfig</span><br><span>+++ b/src/soc/intel/apollolake/Kconfig</span><br><span>@@ -10,6 +10,7 @@</span><br><span> select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT</span><br><span> select SOC_INTEL_COMMON_BLOCK_SGX</span><br><span> select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2</span><br><span style="color: hsl(120, 100%, 40%);">+ select SOC_INTEL_COMMON_EARLY_MMC_WAKE</span><br><span> help</span><br><span> Intel GLK support</span><br><span> </span><br><span>diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc</span><br><span>index 65df559..f1b056d 100644</span><br><span>--- a/src/soc/intel/apollolake/Makefile.inc</span><br><span>+++ b/src/soc/intel/apollolake/Makefile.inc</span><br><span>@@ -90,6 +90,7 @@</span><br><span> romstage-y += gpio_glk.c</span><br><span> smm-y += gpio_glk.c</span><br><span> ramstage-y += gpio_glk.c</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-y += early_mmc.c</span><br><span> else</span><br><span> bootblock-y += gpio_apl.c</span><br><span> romstage-y += gpio_apl.c</span><br><span>diff --git a/src/soc/intel/apollolake/early_mmc.c b/src/soc/intel/apollolake/early_mmc.c</span><br><span>new file mode 100644</span><br><span>index 0000000..9761da0</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/intel/apollolake/early_mmc.c</span><br><span>@@ -0,0 +1,66 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright 2017 Google Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; either version 2 of the License, or</span><br><span style="color: hsl(120, 100%, 40%);">+ * (at your option) any later version.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include "chip.h"</span><br><span style="color: hsl(120, 100%, 40%);">+#include <intelblocks/early_mmc.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <intelblocks/gpio.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/pci_devs.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static const struct pad_config mmc_early_gpios[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_211, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC_RST_B*/</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_104, UP_20K, DEEP, NF1),/*EMMC_DNX_PWR_EN_B*/</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_198, DN_20K, DEEP, NF1, HIZCRx0),/*EMMC0_CLK*/</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF(GPIO_199, DN_20K, DEEP, NF1),/*EMMC0_CLK_FB*/</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_200, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_D0*/</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_201, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_D1*/</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_202, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_D2*/</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_203, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_D3*/</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_204, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_D4*/</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_205, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_D5*/</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_206, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_D6*/</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_207, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_D7*/</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_208, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_CMD*/</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_209, DN_20K, DEEP, NF1, HIZCRx0)/*EMMC0_STROBE*/</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+int soc_set_mmc_gpios(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ gpio_configure_pads(&mmc_early_gpios[0], ARRAY_SIZE(mmc_early_gpios));</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void soc_get_mmc_frequencies(uint32_t* f_min, uint32_t* f_max)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ *f_min = 400000;</span><br><span style="color: hsl(120, 100%, 40%);">+ *f_max = 25000000;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+int soc_set_mmc_dll(struct mmc_dll_params* params)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ const struct device *dev = SA_DEV_ROOT;</span><br><span style="color: hsl(120, 100%, 40%);">+ const struct soc_intel_apollolake_config *config = dev->chip_info;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ params->emmc_tx_data_cntl1 = config->emmc_tx_data_cntl1;</span><br><span style="color: hsl(120, 100%, 40%);">+ params->emmc_tx_data_cntl2 = config->emmc_tx_data_cntl2;</span><br><span style="color: hsl(120, 100%, 40%);">+ params->emmc_rx_cmd_data_cntl1 = config->emmc_rx_cmd_data_cntl1;</span><br><span style="color: hsl(120, 100%, 40%);">+ params->emmc_rx_cmd_data_cntl2 = config->emmc_rx_cmd_data_cntl2;</span><br><span style="color: hsl(120, 100%, 40%);">+ params->emmc_rx_strobe_cntl = config->emmc_rx_strobe_cntl;</span><br><span style="color: hsl(120, 100%, 40%);">+ params->emmc_tx_cmd_cntl = config->emmc_tx_cmd_cntl;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/soc/intel/apollolake/include/soc/iomap.h b/src/soc/intel/apollolake/include/soc/iomap.h</span><br><span>index 7e6a795..a912c3b 100644</span><br><span>--- a/src/soc/intel/apollolake/include/soc/iomap.h</span><br><span>+++ b/src/soc/intel/apollolake/include/soc/iomap.h</span><br><span>@@ -49,6 +49,7 @@</span><br><span> /* Temporary BAR for SPI until PCI enumeration assigns a BAR in ramstage. */</span><br><span> #define PRERAM_SPI_BASE_ADDRESS 0xfe010000</span><br><span> #define EARLY_GSPI_BASE_ADDRESS 0xfe011000</span><br><span style="color: hsl(120, 100%, 40%);">+#define PRERAM_MMC_BASE_ADDRESS 0xfe030000</span><br><span> </span><br><span> /* Temporary BAR for early I2C bus access */</span><br><span> #define PRERAM_I2C_BASE_ADDRESS(x) (0xfe020000 + (0x1000 * (x)))</span><br><span>diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c</span><br><span>index a8a0dd1..77f4af4 100644</span><br><span>--- a/src/soc/intel/apollolake/romstage.c</span><br><span>+++ b/src/soc/intel/apollolake/romstage.c</span><br><span>@@ -52,6 +52,7 @@</span><br><span> #include <delay.h></span><br><span> #include <compiler.h></span><br><span> #include "chip.h"</span><br><span style="color: hsl(120, 100%, 40%);">+#include <intelblocks/early_mmc.h></span><br><span> </span><br><span> static const uint8_t hob_variable_guid[16] = {</span><br><span> 0x7d, 0x14, 0x34, 0xa0, 0x0c, 0x69, 0x54, 0x41,</span><br><span>@@ -198,6 +199,11 @@</span><br><span> s3wake = pmc_fill_power_state(ps) == ACPI_S3;</span><br><span> fsp_memory_init(s3wake);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+ if (IS_ENABLED(CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (early_mmc_wake_hw() < 0)</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "Early mmc initilization failed \n");</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> if (punit_init())</span><br><span> set_max_freq();</span><br><span> else</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25514">change 25514</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ib4e791607059d12b3f5692f6404cb9eb39d79f6d </div>
<div style="display:none"> Gerrit-Change-Number: 25514 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Bora Guvendik <bora.guvendik@intel.com> </div>