<p>Julien Viard de Galbert has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25428">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/denverton_ns: Enable ACPI using intelblock<br><br>- Porting the existing denverton tables to intelblock<br>- Adding C-States table for denverton<br><br>Note: Removed code is functionally identical to corresponding<br>common code.<br><br>Change-Id: Iee061a258a7b1cbf0a69bcfbf36ec2c623e84399<br>Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net><br>---<br>M src/mainboard/scaleway/tagada/acpi_tables.c<br>M src/mainboard/scaleway/tagada/fadt.c<br>M src/soc/intel/common/block/acpi/acpi.c<br>M src/soc/intel/denverton_ns/Kconfig<br>M src/soc/intel/denverton_ns/acpi.c<br>M src/soc/intel/denverton_ns/include/soc/acpi.h<br>M src/soc/intel/denverton_ns/include/soc/nvs.h<br>M src/soc/intel/denverton_ns/include/soc/pm.h<br>M src/soc/intel/denverton_ns/include/soc/pmc.h<br>9 files changed, 90 insertions(+), 123 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/25428/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/scaleway/tagada/acpi_tables.c b/src/mainboard/scaleway/tagada/acpi_tables.c</span><br><span>index acbdb30..35bc4c2 100644</span><br><span>--- a/src/mainboard/scaleway/tagada/acpi_tables.c</span><br><span>+++ b/src/mainboard/scaleway/tagada/acpi_tables.c</span><br><span>@@ -29,6 +29,7 @@</span><br><span> #include <cpu/cpu.h></span><br><span> #include <cpu/x86/msr.h></span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#include <intelblocks/acpi.h></span><br><span> #include <soc/acpi.h></span><br><span> #include <soc/nvs.h></span><br><span> </span><br><span>@@ -45,17 +46,3 @@</span><br><span> /* TPM Present */</span><br><span> gnvs->tpmp = 0;</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-unsigned long acpi_fill_madt(unsigned long current)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- /* Local APICs */</span><br><span style="color: hsl(0, 100%, 40%);">- current = acpi_create_madt_lapics(current);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* IOAPIC */</span><br><span style="color: hsl(0, 100%, 40%);">- current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, 2,</span><br><span style="color: hsl(0, 100%, 40%);">- IO_APIC_ADDR, 0);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- current = acpi_madt_irq_overrides(current);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return current;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/mainboard/scaleway/tagada/fadt.c b/src/mainboard/scaleway/tagada/fadt.c</span><br><span>index 9f41f64..6259c2d 100644</span><br><span>--- a/src/mainboard/scaleway/tagada/fadt.c</span><br><span>+++ b/src/mainboard/scaleway/tagada/fadt.c</span><br><span>@@ -3,6 +3,7 @@</span><br><span> *</span><br><span> * Copyright (C) 2007 - 2009 coresystems GmbH</span><br><span> * Copyright (C) 2014 - 2017 Intel Corporation.</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Online SAS</span><br><span> *</span><br><span> * This program is free software; you can redistribute it and/or modify</span><br><span> * it under the terms of the GNU General Public License as published by</span><br><span>@@ -21,30 +22,8 @@</span><br><span> #include <soc/acpi.h></span><br><span> #include <soc/soc_util.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)</span><br><span style="color: hsl(120, 100%, 40%);">+void motherboard_fill_fadt(acpi_fadt_t *fadt)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- acpi_header_t *header = &(fadt->header);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- memset((void *)fadt, 0, sizeof(acpi_fadt_t));</span><br><span style="color: hsl(0, 100%, 40%);">- memcpy_s(header->signature, "FACP", 4);</span><br><span style="color: hsl(0, 100%, 40%);">- header->length = sizeof(acpi_fadt_t);</span><br><span style="color: hsl(0, 100%, 40%);">- header->revision = 3;</span><br><span style="color: hsl(0, 100%, 40%);">- memcpy_s(header->oem_id, OEM_ID, 6);</span><br><span style="color: hsl(0, 100%, 40%);">- memcpy_s(header->oem_table_id, ACPI_TABLE_CREATOR, 8);</span><br><span style="color: hsl(0, 100%, 40%);">- memcpy_s(header->asl_compiler_id, ASLC, 4);</span><br><span style="color: hsl(0, 100%, 40%);">- header->asl_compiler_revision = 1;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->firmware_ctrl = (unsigned long)facs;</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->dsdt = (unsigned long)dsdt;</span><br><span> fadt->model = 1;</span><br><span> fadt->preferred_pm_profile = PM_ENTERPRISE_SERVER;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->x_firmware_ctl_l = (unsigned long)facs;</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->x_firmware_ctl_h = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->x_dsdt_l = (unsigned long)dsdt;</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->x_dsdt_h = 0;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- acpi_fill_in_fadt(fadt);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- header->checksum = acpi_checksum((void *)fadt, header->length);</span><br><span> }</span><br><span>diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c</span><br><span>index bf4003d..ae0617d 100644</span><br><span>--- a/src/soc/intel/common/block/acpi/acpi.c</span><br><span>+++ b/src/soc/intel/common/block/acpi/acpi.c</span><br><span>@@ -31,7 +31,7 @@</span><br><span> #include <soc/nvs.h></span><br><span> #include <soc/pm.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-unsigned long acpi_fill_mcfg(unsigned long current)</span><br><span style="color: hsl(120, 100%, 40%);">+__attribute__((weak)) unsigned long acpi_fill_mcfg(unsigned long current)</span><br><span> {</span><br><span> /* PCI Segment Group 0, Start Bus Number 0, End Bus Number is 255 */</span><br><span> current += acpi_create_mcfg_mmconfig((void *)current,</span><br><span>@@ -180,6 +180,7 @@</span><br><span> return generic_pm1_en;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#if IS_ENABLED(CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE)</span><br><span> /*</span><br><span> * Save wake source information for calculating ACPI _SWS values</span><br><span> *</span><br><span>@@ -218,6 +219,7 @@</span><br><span> </span><br><span> return GPE0_REG_MAX;</span><br><span> }</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span> </span><br><span> __attribute__ ((weak)) void acpi_create_gnvs(struct global_nvs_t *gnvs)</span><br><span> {</span><br><span>diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig</span><br><span>index 303b1e5..b9b3159 100644</span><br><span>--- a/src/soc/intel/denverton_ns/Kconfig</span><br><span>+++ b/src/soc/intel/denverton_ns/Kconfig</span><br><span>@@ -44,8 +44,10 @@</span><br><span> select PARALLEL_MP</span><br><span> select PCR_COMMON_IOSF_1_0</span><br><span> select SMP</span><br><span style="color: hsl(120, 100%, 40%);">+ select COMMON_FADT</span><br><span> select SOC_INTEL_COMMON_BLOCK</span><br><span> select SOC_INTEL_COMMON_BLOCK_CPU</span><br><span style="color: hsl(120, 100%, 40%);">+ select SOC_INTEL_COMMON_BLOCK_ACPI</span><br><span> select SOC_INTEL_COMMON_BLOCK_PMC</span><br><span> select ACPI_INTEL_HARDWARE_SLEEP_VALUES</span><br><span> # select SOC_INTEL_COMMON_BLOCK_SA</span><br><span>diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c</span><br><span>index 433d611..58c4891 100644</span><br><span>--- a/src/soc/intel/denverton_ns/acpi.c</span><br><span>+++ b/src/soc/intel/denverton_ns/acpi.c</span><br><span>@@ -4,6 +4,7 @@</span><br><span> * Copyright (C) 2007 - 2009 coresystems GmbH</span><br><span> * Copyright (C) 2013 Google Inc.</span><br><span> * Copyright (C) 2014 - 2017 Intel Corporation.</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Online SAS</span><br><span> *</span><br><span> * This program is free software; you can redistribute it and/or modify</span><br><span> * it under the terms of the GNU General Public License as published by</span><br><span>@@ -25,12 +26,54 @@</span><br><span> #include <cpu/cpu.h></span><br><span> #include <cbmem.h></span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#include <intelblocks/acpi.h></span><br><span> #include <soc/acpi.h></span><br><span> #include <soc/cpu.h></span><br><span> #include <soc/soc_util.h></span><br><span> #include <soc/pmc.h></span><br><span> #include <soc/systemagent.h></span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#define MWAIT_RES(state, sub_state) \</span><br><span style="color: hsl(120, 100%, 40%);">+ { \</span><br><span style="color: hsl(120, 100%, 40%);">+ .addrl = (((state) << 4) | (sub_state)), \</span><br><span style="color: hsl(120, 100%, 40%);">+ .space_id = ACPI_ADDRESS_SPACE_FIXED, \</span><br><span style="color: hsl(120, 100%, 40%);">+ .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \</span><br><span style="color: hsl(120, 100%, 40%);">+ .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \</span><br><span style="color: hsl(120, 100%, 40%);">+ .access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define CSTATE_RES(address_space, width, offset, address) \</span><br><span style="color: hsl(120, 100%, 40%);">+ { \</span><br><span style="color: hsl(120, 100%, 40%);">+ .space_id = address_space, \</span><br><span style="color: hsl(120, 100%, 40%);">+ .bit_width = width, \</span><br><span style="color: hsl(120, 100%, 40%);">+ .bit_offset = offset, \</span><br><span style="color: hsl(120, 100%, 40%);">+ .addrl = address, \</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static acpi_cstate_t cstate_map[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* C1 */</span><br><span style="color: hsl(120, 100%, 40%);">+ .ctype = 1, /* ACPI C1 */</span><br><span style="color: hsl(120, 100%, 40%);">+ .latency = 2,</span><br><span style="color: hsl(120, 100%, 40%);">+ .power = 1000,</span><br><span style="color: hsl(120, 100%, 40%);">+ .resource = MWAIT_RES(0, 0),</span><br><span style="color: hsl(120, 100%, 40%);">+ },</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ .ctype = 2, /* ACPI C2 */</span><br><span style="color: hsl(120, 100%, 40%);">+ .latency = 10,</span><br><span style="color: hsl(120, 100%, 40%);">+ .power = 10,</span><br><span style="color: hsl(120, 100%, 40%);">+ .resource = CSTATE_RES(ACPI_ADDRESS_SPACE_IO, 8, 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ ACPI_BASE_ADDRESS + 0x14),</span><br><span style="color: hsl(120, 100%, 40%);">+ },</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ .ctype = 3, /* ACPI C3 */</span><br><span style="color: hsl(120, 100%, 40%);">+ .latency = 50,</span><br><span style="color: hsl(120, 100%, 40%);">+ .power = 10,</span><br><span style="color: hsl(120, 100%, 40%);">+ .resource = CSTATE_RES(ACPI_ADDRESS_SPACE_IO, 8, 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ ACPI_BASE_ADDRESS + 0x15),</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> void acpi_init_gnvs(global_nvs_t *gnvs)</span><br><span> {</span><br><span> /* CPU core count */</span><br><span>@@ -53,36 +96,20 @@</span><br><span> gnvs->tsegl = (u32)(get_top_of_low_memory() - get_tseg_memory());</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int acpi_sci_irq(void)</span><br><span style="color: hsl(120, 100%, 40%);">+uint32_t soc_read_sci_irq_select(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- int scis, sci_irq;</span><br><span> device_t dev = get_pmc_dev();</span><br><span> </span><br><span> if (!dev)</span><br><span> return 0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Determine how SCI is routed. */</span><br><span style="color: hsl(0, 100%, 40%);">- scis = pci_read_config32(dev, PMC_ACPI_CNT) & PMC_ACPI_CNT_SCIS_MASK;</span><br><span style="color: hsl(0, 100%, 40%);">- switch (scis) {</span><br><span style="color: hsl(0, 100%, 40%);">- case PMC_ACPI_CNT_SCIS_IRQ9:</span><br><span style="color: hsl(0, 100%, 40%);">- case PMC_ACPI_CNT_SCIS_IRQ10:</span><br><span style="color: hsl(0, 100%, 40%);">- case PMC_ACPI_CNT_SCIS_IRQ11:</span><br><span style="color: hsl(0, 100%, 40%);">- sci_irq = scis - PMC_ACPI_CNT_SCIS_IRQ9 + 9;</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- case PMC_ACPI_CNT_SCIS_IRQ20:</span><br><span style="color: hsl(0, 100%, 40%);">- case PMC_ACPI_CNT_SCIS_IRQ21:</span><br><span style="color: hsl(0, 100%, 40%);">- case PMC_ACPI_CNT_SCIS_IRQ22:</span><br><span style="color: hsl(0, 100%, 40%);">- case PMC_ACPI_CNT_SCIS_IRQ23:</span><br><span style="color: hsl(0, 100%, 40%);">- sci_irq = scis - PMC_ACPI_CNT_SCIS_IRQ20 + 20;</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- default:</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- sci_irq = 9;</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(120, 100%, 40%);">+ return pci_read_config32(dev, PMC_ACPI_CNT);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq);</span><br><span style="color: hsl(0, 100%, 40%);">- return sci_irq;</span><br><span style="color: hsl(120, 100%, 40%);">+acpi_cstate_t *soc_get_cstate_map(size_t *entries)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ *entries = ARRAY_SIZE(cstate_map);</span><br><span style="color: hsl(120, 100%, 40%);">+ return cstate_map;</span><br><span> }</span><br><span> </span><br><span> unsigned long acpi_fill_mcfg(unsigned long current)</span><br><span>@@ -103,16 +130,17 @@</span><br><span> return current;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void acpi_fill_in_fadt(acpi_fadt_t *fadt)</span><br><span style="color: hsl(120, 100%, 40%);">+__attribute__ ((weak)) void motherboard_fill_fadt(acpi_fadt_t *fadt)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void soc_fill_fadt(acpi_fadt_t *fadt)</span><br><span> {</span><br><span> u16 pmbase = get_pmbase();</span><br><span> </span><br><span> /* System Management */</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->sci_int = acpi_sci_irq();</span><br><span> #if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->smi_cmd = APM_CNT;</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->acpi_enable = APM_CNT_ACPI_ENABLE;</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->acpi_disable = APM_CNT_ACPI_DISABLE;</span><br><span style="color: hsl(120, 100%, 40%);">+ // done in common code</span><br><span> #else</span><br><span> fadt->smi_cmd = 0x00;</span><br><span> fadt->acpi_enable = 0x00;</span><br><span>@@ -120,21 +148,11 @@</span><br><span> #endif</span><br><span> </span><br><span> /* Power Control */</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->s4bios_req = 0x0;</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->pstate_cnt = 0;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->pm1a_evt_blk = pmbase + PM1_STS;</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->pm1b_evt_blk = 0x0;</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->pm1a_cnt_blk = pmbase + PM1_CNT;</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->pm1b_cnt_blk = 0x0;</span><br><span> fadt->pm2_cnt_blk = pmbase + PM2_CNT;</span><br><span> fadt->pm_tmr_blk = pmbase + PM1_TMR;</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->gpe0_blk = pmbase + GPE0_STS(0);</span><br><span> fadt->gpe1_blk = 0;</span><br><span> </span><br><span> /* Control Registers - Length */</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->pm1_evt_len = 4;</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->pm1_cnt_len = 2;</span><br><span> fadt->pm2_cnt_len = 1;</span><br><span> fadt->pm_tmr_len = 4;</span><br><span> fadt->gpe0_blk_len = 8;</span><br><span>@@ -228,53 +246,16 @@</span><br><span> fadt->x_gpe1_blk.access_size = 0;</span><br><span> fadt->x_gpe1_blk.addrl = fadt->gpe1_blk;</span><br><span> fadt->x_gpe1_blk.addrh = 0x00;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ motherboard_fill_fadt(fadt);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void generate_cpu_entries(device_t device)</span><br><span style="color: hsl(120, 100%, 40%);">+int soc_madt_sci_irq_polarity(int sci)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- int core;</span><br><span style="color: hsl(0, 100%, 40%);">- int pcontrol_blk = get_pmbase(), plen = 6;</span><br><span style="color: hsl(0, 100%, 40%);">- int num_cpus = get_cpu_count();</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- for (core = 0; core < num_cpus; core++) {</span><br><span style="color: hsl(0, 100%, 40%);">- if (core > 0) {</span><br><span style="color: hsl(0, 100%, 40%);">- pcontrol_blk = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- plen = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Generate processor \_PR.CPUx */</span><br><span style="color: hsl(0, 100%, 40%);">- acpigen_write_processor(core, pcontrol_blk, plen);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Generate P-state tables */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Generate C-state tables */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Generate T-state tables */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- acpigen_pop_len();</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-unsigned long acpi_madt_irq_overrides(unsigned long current)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- int sci_irq = acpi_sci_irq();</span><br><span style="color: hsl(0, 100%, 40%);">- acpi_madt_irqoverride_t *irqovr;</span><br><span style="color: hsl(0, 100%, 40%);">- uint16_t sci_flags = MP_IRQ_TRIGGER_LEVEL;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* INT_SRC_OVR */</span><br><span style="color: hsl(0, 100%, 40%);">- irqovr = (acpi_madt_irqoverride_t *)current;</span><br><span style="color: hsl(0, 100%, 40%);">- current += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (sci_irq >= 20)</span><br><span style="color: hsl(0, 100%, 40%);">- sci_flags |= MP_IRQ_POLARITY_LOW;</span><br><span style="color: hsl(120, 100%, 40%);">+ if (sci >= 20)</span><br><span style="color: hsl(120, 100%, 40%);">+ return MP_IRQ_POLARITY_LOW;</span><br><span> else</span><br><span style="color: hsl(0, 100%, 40%);">- sci_flags |= MP_IRQ_POLARITY_HIGH;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- irqovr = (acpi_madt_irqoverride_t *)current;</span><br><span style="color: hsl(0, 100%, 40%);">- current += acpi_create_madt_irqoverride(irqovr, 0, (u8)sci_irq, sci_irq,</span><br><span style="color: hsl(0, 100%, 40%);">- sci_flags);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return current;</span><br><span style="color: hsl(120, 100%, 40%);">+ return MP_IRQ_POLARITY_HIGH;</span><br><span> }</span><br><span> </span><br><span> unsigned long southcluster_write_acpi_tables(device_t device,</span><br><span>diff --git a/src/soc/intel/denverton_ns/include/soc/acpi.h b/src/soc/intel/denverton_ns/include/soc/acpi.h</span><br><span>index dd2be4d..588994d 100644</span><br><span>--- a/src/soc/intel/denverton_ns/include/soc/acpi.h</span><br><span>+++ b/src/soc/intel/denverton_ns/include/soc/acpi.h</span><br><span>@@ -23,12 +23,12 @@</span><br><span> </span><br><span> void acpi_create_intel_hpet(acpi_hpet_t *hpet);</span><br><span> void acpi_create_serialio_ssdt(acpi_header_t *ssdt);</span><br><span style="color: hsl(0, 100%, 40%);">-void acpi_fill_in_fadt(acpi_fadt_t *fadt);</span><br><span> unsigned long acpi_madt_irq_overrides(unsigned long current);</span><br><span> void acpi_init_gnvs(global_nvs_t *gnvs);</span><br><span> unsigned long southcluster_write_acpi_tables(device_t device,</span><br><span> unsigned long current,</span><br><span> struct acpi_rsdp *rsdp);</span><br><span> void southcluster_inject_dsdt(device_t device);</span><br><span style="color: hsl(120, 100%, 40%);">+void motherboard_fill_fadt(acpi_fadt_t *fadt);</span><br><span> </span><br><span> #endif /* _DENVERTON_NS_ACPI_H_ */</span><br><span>diff --git a/src/soc/intel/denverton_ns/include/soc/nvs.h b/src/soc/intel/denverton_ns/include/soc/nvs.h</span><br><span>index cf10823..5a94b24 100644</span><br><span>--- a/src/soc/intel/denverton_ns/include/soc/nvs.h</span><br><span>+++ b/src/soc/intel/denverton_ns/include/soc/nvs.h</span><br><span>@@ -19,7 +19,7 @@</span><br><span> #ifndef _DENVERTON_NS_NVS_H_</span><br><span> #define _DENVERTON_NS_NVS_H_</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-typedef struct {</span><br><span style="color: hsl(120, 100%, 40%);">+typedef struct global_nvs_t {</span><br><span> /* Miscellaneous */</span><br><span> u16 osys; /* 0x00 - Operating System */</span><br><span> u8 smif; /* 0x02 - SMI function call ("TRAP") */</span><br><span>@@ -63,9 +63,8 @@</span><br><span> u32 tsegl; /* 0x58 - TSEG Length/Size */</span><br><span> u8 rsvd3[164];</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-} __attribute__((packed)) global_nvs_t;</span><br><span style="color: hsl(120, 100%, 40%);">+} __packed global_nvs_t;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void acpi_create_gnvs(global_nvs_t *gnvs);</span><br><span> #ifdef __SMM__</span><br><span> /* Used in SMM to find the ACPI GNVS address */</span><br><span> global_nvs_t *smm_get_gnvs(void);</span><br><span>diff --git a/src/soc/intel/denverton_ns/include/soc/pm.h b/src/soc/intel/denverton_ns/include/soc/pm.h</span><br><span>index e44d942..3f9cc4e 100644</span><br><span>--- a/src/soc/intel/denverton_ns/include/soc/pm.h</span><br><span>+++ b/src/soc/intel/denverton_ns/include/soc/pm.h</span><br><span>@@ -25,6 +25,12 @@</span><br><span> /* TODO: Check that */</span><br><span> #define GPE_MAX 127</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/* P-state configuration */</span><br><span style="color: hsl(120, 100%, 40%);">+#define PSS_MAX_ENTRIES 15</span><br><span style="color: hsl(120, 100%, 40%);">+#define PSS_RATIO_STEP 1</span><br><span style="color: hsl(120, 100%, 40%);">+#define PSS_LATENCY_TRANSITION 10</span><br><span style="color: hsl(120, 100%, 40%);">+#define PSS_LATENCY_BUSMASTER 10</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> struct chipset_power_state {</span><br><span> uint16_t pm1_sts;</span><br><span> uint16_t pm1_en;</span><br><span>diff --git a/src/soc/intel/denverton_ns/include/soc/pmc.h b/src/soc/intel/denverton_ns/include/soc/pmc.h</span><br><span>index 4db3981..f5df21a 100644</span><br><span>--- a/src/soc/intel/denverton_ns/include/soc/pmc.h</span><br><span>+++ b/src/soc/intel/denverton_ns/include/soc/pmc.h</span><br><span>@@ -38,6 +38,17 @@</span><br><span> #define PMC_ACPI_CNT_SCIS_IRQ21 0x05</span><br><span> #define PMC_ACPI_CNT_SCIS_IRQ22 0x06</span><br><span> #define PMC_ACPI_CNT_SCIS_IRQ23 0x07</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define SCI_IRQ_ADJUST 0</span><br><span style="color: hsl(120, 100%, 40%);">+#define SCI_IRQ_SEL (0x07 << SCI_IRQ_ADJUST)</span><br><span style="color: hsl(120, 100%, 40%);">+#define SCIS_IRQ9 0x00</span><br><span style="color: hsl(120, 100%, 40%);">+#define SCIS_IRQ10 0x01</span><br><span style="color: hsl(120, 100%, 40%);">+#define SCIS_IRQ11 0x02</span><br><span style="color: hsl(120, 100%, 40%);">+#define SCIS_IRQ20 0x04</span><br><span style="color: hsl(120, 100%, 40%);">+#define SCIS_IRQ21 0x05</span><br><span style="color: hsl(120, 100%, 40%);">+#define SCIS_IRQ22 0x06</span><br><span style="color: hsl(120, 100%, 40%);">+#define SCIS_IRQ23 0x07</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #define PMC_PWRM_BASE 0x48 /* MEM BAR */</span><br><span> #define MASK_PMC_PWRM_BASE 0xfffff000 /* 4K alignment */</span><br><span> #define PMC_GEN_PMCON_A 0xA0</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25428">change 25428</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Iee061a258a7b1cbf0a69bcfbf36ec2c623e84399 </div>
<div style="display:none"> Gerrit-Change-Number: 25428 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Julien Viard de Galbert <jviarddegalbert@online.net> </div>