<p>Patrick Rudolph has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25450">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/cavium/cn81xx: Set cntfrq_el0<br><br>Set cntfrq_el0 to provide correct timer frequency.<br><br>Change-Id: I4b6d0b0cf646a066fc5a51552a1891eccbd91e5e<br>Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com><br>---<br>M src/mainboard/cavium/cn8100_sff_evb/mainboard.c<br>M src/soc/cavium/cn81xx/include/soc/timer.h<br>M src/soc/cavium/cn81xx/timer.c<br>3 files changed, 16 insertions(+), 2 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/25450/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/cavium/cn8100_sff_evb/mainboard.c b/src/mainboard/cavium/cn8100_sff_evb/mainboard.c</span><br><span>index 0887cde..d9df011 100644</span><br><span>--- a/src/mainboard/cavium/cn8100_sff_evb/mainboard.c</span><br><span>+++ b/src/mainboard/cavium/cn8100_sff_evb/mainboard.c</span><br><span>@@ -19,6 +19,7 @@</span><br><span> #include <console/console.h></span><br><span> #include <soc/clock.h></span><br><span> #include <soc/gpio.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/timer.h></span><br><span> </span><br><span> static void mainboard_print_info(void)</span><br><span> {</span><br><span>@@ -70,6 +71,9 @@</span><br><span> if (!uart_is_enabled(i))</span><br><span> uart_setup(i, 0);</span><br><span> }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Init timer */</span><br><span style="color: hsl(120, 100%, 40%);">+ soc_timer_init();</span><br><span> }</span><br><span> </span><br><span> static void mainboard_enable(device_t dev)</span><br><span>diff --git a/src/soc/cavium/cn81xx/include/soc/timer.h b/src/soc/cavium/cn81xx/include/soc/timer.h</span><br><span>index 6d48831..f9e5961 100644</span><br><span>--- a/src/soc/cavium/cn81xx/include/soc/timer.h</span><br><span>+++ b/src/soc/cavium/cn81xx/include/soc/timer.h</span><br><span>@@ -17,4 +17,7 @@</span><br><span> void watchdog_disable(const size_t index);</span><br><span> int watchdog_is_running(const size_t index);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/* Timer functions */</span><br><span style="color: hsl(120, 100%, 40%);">+void soc_timer_init(void);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #endif /* __SOC_CAVIUM_CN81XX_TIMER_H__ */</span><br><span>diff --git a/src/soc/cavium/cn81xx/timer.c b/src/soc/cavium/cn81xx/timer.c</span><br><span>index ee8d639..ab8391b 100644</span><br><span>--- a/src/soc/cavium/cn81xx/timer.c</span><br><span>+++ b/src/soc/cavium/cn81xx/timer.c</span><br><span>@@ -17,6 +17,7 @@</span><br><span> #include <timer.h></span><br><span> #include <soc/addressmap.h></span><br><span> #include <assert.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/clock.h></span><br><span> </span><br><span> /* Global System Timers Unit (GTI) registers */</span><br><span> struct cn81xx_timer {</span><br><span>@@ -89,6 +90,9 @@</span><br><span> mono_time_set_usecs(mt, timer_raw_value());</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/* Setup counter to operate at 1MHz */</span><br><span style="color: hsl(120, 100%, 40%);">+static const size_t tickrate = 1000000;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /**</span><br><span> * Init Global System Timers Unit (GTI).</span><br><span> * Configure timer to run at 1MHz tick-rate.</span><br><span>@@ -106,8 +110,6 @@</span><br><span> /* Use coprocessor clock source */</span><br><span> write32(>i->cc_imp_ctl, 0);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Setup counter to operate at 1MHz */</span><br><span style="color: hsl(0, 100%, 40%);">- const size_t tickrate = 1000000;</span><br><span> write32(>i->cc_cntfid0, tickrate);</span><br><span> write32(>i->ctl_cntfrq, tickrate);</span><br><span> write32(>i->cc_cntrate, ((1ULL << 32) * tickrate) / sclk);</span><br><span>@@ -119,6 +121,11 @@</span><br><span> //BDK_MSR(CNTPS_CTL_EL1, u);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+void soc_timer_init(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ set_cntfrq(tickrate);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /**</span><br><span> * Setup the watchdog to expire in timeout_ms milliseconds. When the watchdog</span><br><span> * expires, the chip three things happen:</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25450">change 25450</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25450"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I4b6d0b0cf646a066fc5a51552a1891eccbd91e5e </div>
<div style="display:none"> Gerrit-Change-Number: 25450 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Patrick Rudolph <patrick.rudolph@9elements.com> </div>