<p>Julien Viard de Galbert has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25444">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/denverton + mb: Change UART IRQ line in conflict with ME<br><br>Change the UART IRQ line from A/16 to G/22<br><br>The IRQ conflict was trigered by using the tools spsInfo or spsManuf.<br><br>Change-Id: I0c59ff80ef19b54c2de1a6a8205afe6482adfdff<br>Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net><br>---<br>M src/mainboard/intel/harcuvar/devicetree.cb<br>M src/mainboard/scaleway/tagada/devicetree.cb<br>M src/soc/intel/denverton_ns/acpi/lpc.asl<br>3 files changed, 3 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/25444/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/intel/harcuvar/devicetree.cb b/src/mainboard/intel/harcuvar/devicetree.cb</span><br><span>index 7fce211..e6c4aa2 100644</span><br><span>--- a/src/mainboard/intel/harcuvar/devicetree.cb</span><br><span>+++ b/src/mainboard/intel/harcuvar/devicetree.cb</span><br><span>@@ -35,7 +35,7 @@</span><br><span>         register "ir07_routing" = "0x3210" # IR07, Dev9/10/11/12</span><br><span>         register "ir08_routing" = "0x7654" # IR08, Dev14/15/16/17</span><br><span>        register "ir09_routing" = "0x3213" # IR09, Dev21</span><br><span style="color: hsl(0, 100%, 40%);">-    register "ir10_routing" = "0x3210" # IR10, Dev26/18</span><br><span style="color: hsl(120, 100%, 40%);">+       register "ir10_routing" = "0x3216" # IR10, Dev26/18</span><br><span>      register "ir11_routing" = "0x3215" # IR11, Dev20</span><br><span>         register "ir12_routing" = "0x3210" # IR12, Dev27</span><br><span>         # configure interrupt polarity control</span><br><span>diff --git a/src/mainboard/scaleway/tagada/devicetree.cb b/src/mainboard/scaleway/tagada/devicetree.cb</span><br><span>index acf56a0..f878e95 100644</span><br><span>--- a/src/mainboard/scaleway/tagada/devicetree.cb</span><br><span>+++ b/src/mainboard/scaleway/tagada/devicetree.cb</span><br><span>@@ -35,7 +35,7 @@</span><br><span>  register "ir07_routing" = "0x3210" # IR07, Dev9/10/11/12</span><br><span>         register "ir08_routing" = "0x7654" # IR08, Dev14/15/16/17</span><br><span>        register "ir09_routing" = "0x3213" # IR09, Dev21</span><br><span style="color: hsl(0, 100%, 40%);">-    register "ir10_routing" = "0x3210" # IR10, Dev26/18</span><br><span style="color: hsl(120, 100%, 40%);">+       register "ir10_routing" = "0x3216" # IR10, Dev26/18</span><br><span>      register "ir11_routing" = "0x3215" # IR11, Dev20</span><br><span>         register "ir12_routing" = "0x3210" # IR12, Dev27</span><br><span>         # configure interrupt polarity control</span><br><span>diff --git a/src/soc/intel/denverton_ns/acpi/lpc.asl b/src/soc/intel/denverton_ns/acpi/lpc.asl</span><br><span>index 262ac55..4ae3c35 100644</span><br><span>--- a/src/soc/intel/denverton_ns/acpi/lpc.asl</span><br><span>+++ b/src/soc/intel/denverton_ns/acpi/lpc.asl</span><br><span>@@ -153,7 +153,7 @@</span><br><span>                Name(BUF0,ResourceTemplate()</span><br><span>                 {</span><br><span>              IO(Decode16,0x03F8,0x03F8,0x01,0x08)</span><br><span style="color: hsl(0, 100%, 40%);">-            Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {16}</span><br><span style="color: hsl(120, 100%, 40%);">+           Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {22}</span><br><span>                })</span><br><span> </span><br><span>               Return(BUF0)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25444">change 25444</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25444"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I0c59ff80ef19b54c2de1a6a8205afe6482adfdff </div>
<div style="display:none"> Gerrit-Change-Number: 25444 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Julien Viard de Galbert <jviarddegalbert@online.net> </div>