<p>Furquan Shaikh has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25417">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/google/octopus: Fix wifi configuration<br><br>This change updates devicetree and GPIO configurations to match the<br>schematics:<br>1. pcie_rp...[2] is the one being used for wifi, thus, clk_req and<br>deemphasis_enable for [2] need to be set instead of [0].<br>2. WLAN power enable, wifi disable and PERST# GPIOs need to be<br>configured correctly.<br><br>BUG=b:76180142<br>TEST=Verified that wlan0 scan works.<br><br>Change-Id: Ic51a94902e2cac3491081ade32079e5b88719f45<br>Signed-off-by: Furquan Shaikh <furquan@google.com><br>---<br>M src/mainboard/google/octopus/variants/baseboard/devicetree.cb<br>M src/mainboard/google/octopus/variants/baseboard/gpio.c<br>2 files changed, 18 insertions(+), 10 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/25417/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb</span><br><span>index 7aa7038..f76f887 100644</span><br><span>--- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb</span><br><span>+++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb</span><br><span>@@ -3,20 +3,20 @@</span><br><span> device lapic 0 on end</span><br><span> end</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- register "pcie_rp_clkreq_pin[0]" = "3" # wifi/bt</span><br><span style="color: hsl(120, 100%, 40%);">+ register "pcie_rp_clkreq_pin[2]" = "3" # wifi/bt</span><br><span> # Disable unused clkreq of PCIe root ports</span><br><span style="color: hsl(120, 100%, 40%);">+ register "pcie_rp_clkreq_pin[0]" = "CLKREQ_DISABLED"</span><br><span> register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED"</span><br><span style="color: hsl(0, 100%, 40%);">- register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED"</span><br><span> register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED"</span><br><span> register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED"</span><br><span> register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"</span><br><span> </span><br><span> # Set de-emphasis to disabled for PCIE WiFI (Thunderpeak)</span><br><span> # as it is required for detection</span><br><span style="color: hsl(0, 100%, 40%);">- register "pcie_rp_deemphasis_enable[0]" = "0"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "pcie_rp_deemphasis_enable[2]" = "0"</span><br><span> # Set de-emphasis to default (enabled) for remaining ports</span><br><span style="color: hsl(120, 100%, 40%);">+ register "pcie_rp_deemphasis_enable[0]" = "1"</span><br><span> register "pcie_rp_deemphasis_enable[1]" = "1"</span><br><span style="color: hsl(0, 100%, 40%);">- register "pcie_rp_deemphasis_enable[2]" = "1"</span><br><span> register "pcie_rp_deemphasis_enable[3]" = "1"</span><br><span> register "pcie_rp_deemphasis_enable[4]" = "1"</span><br><span> register "pcie_rp_deemphasis_enable[5]" = "1"</span><br><span>@@ -105,7 +105,11 @@</span><br><span> device pci 0f.2 on end # - Heci3</span><br><span> device pci 11.0 off end # - ISH</span><br><span> device pci 12.0 off end # - SATA</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 13.0 on end # - PCIe-A 0 Onboard M2 Slot(Wifi)</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 13.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/intel/wifi</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 00.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+ end # - PCIe-A 0 Onboard M2 Slot(Wifi)</span><br><span> device pci 13.1 off end # - PCIe-A 1</span><br><span> device pci 13.2 off end # - PCIe-A 2</span><br><span> device pci 13.3 off end # - PCIe-A 3</span><br><span>diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c</span><br><span>index a127f28..8ce0e89 100644</span><br><span>--- a/src/mainboard/google/octopus/variants/baseboard/gpio.c</span><br><span>+++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c</span><br><span>@@ -161,17 +161,17 @@</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_115, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* LPSS_I2C7_SCL */</span><br><span> </span><br><span> /* PCIE_WAKE[0:3]_B */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_116, 1, DEEP, UP_20K, HIZCRx1, ENPU),/* PCIE_WAKE0_B -- WIFI_DISABLE_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPO(GPIO_116, 1, DEEP), /* WIFI_DISABLE_L */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_117, NONE, DEEP, NF1, TxDRxE, DISPUPD),/* PCIE_WAKE1_B */</span><br><span> PAD_CFG_GPIO_HI_Z(GPIO_118, NONE, DEEP, HIZCRx0, DISPUPD),/* PCIE_WAKE2_B -- unused */</span><br><span> //TODO Reef uses PCIE_WAKE0 as GPI_SCI. Whats the difference?</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_119, NONE, DEEP, NF1, TxDRxE, DISPUPD),/* PCIE_WAKE3_B */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* PCIE_WAKE[0:3]_B */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* PCIE_CLKREQ[0:3]_B */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_120, UP_20K, DEEP, NF1, HIZCRx1, ENPU),/* PCIE_CLKREQ0_B -- unused*/</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_121, UP_20K, DEEP, NF1, HIZCRx1, ENPU),/* PCIE_CLKREQ1_B -- unused */</span><br><span> PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_122, 0, DEEP, DN_20K, HIZCRx0, ENPD),/* PCIE_CLKREQ2_B -- EN_PP3300_WLAN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_123, UP_20K, DEEP, NF1, TxDRxE, ENPU),/* PCIE_CLKREQ3_B */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_123, UP_20K, DEEP, NF1, TxDRxE, DISPUPD), /* PCIE_CLKREQ3_B */</span><br><span> </span><br><span> /* DDI[0:1] SDA and SCL -- unused */</span><br><span> PAD_CFG_GPIO_HI_Z(GPIO_124, NONE, DEEP, HIZCRx0, DISPUPD),/* HV_DDI0_DDC_SDA -- unused */</span><br><span>@@ -218,7 +218,7 @@</span><br><span> PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_161, 0, DEEP, NONE, HIZCRx0, DISPUPD), /* AVS_I2S1_MCLK */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_162, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* AVS_I2S1_BCLK */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_163, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* AVS_I2S1_WS_SYNC */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_164, 0, DEEP, NONE, HIZCRx0, ENPD), /* AVS_I2S1_SDI */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPO(GPIO_164, 0, DEEP), /* WLAN_PE_RST */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_165, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* AVS_I2S1_SDO */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_166, NONE, DEEP, NF2, HIZCRx0, SAME), /* AVS_I2S2_BCLK */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_167, NONE, DEEP, NF2, HIZCRx0, DISPUPD), /* AVS_I2S2_WS_SYNC */</span><br><span>@@ -234,7 +234,7 @@</span><br><span> /* SCC COMMUNITY GPIOS */</span><br><span> PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_176, 0, DEEP, NONE, HIZCRx0, DISPUPD), /* SMB_ALERTB */</span><br><span> PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_177, 0, DEEP, NONE, HIZCRx0, DISPUPD), /* SMB_CLK */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 0, DEEP, NONE, HIZCRx0, DISPUPD), /* SMB_DATA */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPO(GPIO_178, 1, DEEP), /* EN_PP3300_WLAN */</span><br><span> PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_189, 0, DEEP, NONE, TxDRxE, DISPUPD), /* OSC_CLK_OUT_0 */</span><br><span> PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_191, NONE, DEEP, NF1), /* CNV_BRI_DT */</span><br><span> PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_192, UP_20K, DEEP, NF1), /* CNV_BRI_RSP */</span><br><span>@@ -275,6 +275,10 @@</span><br><span> PAD_CFG_NF(GPIO_82, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MISO */</span><br><span> /* GSPI0_MOSI */</span><br><span> PAD_CFG_NF(GPIO_83, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MOSI_R */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Enable power to wifi early in bootblock and de-assert PERST#. */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPO(GPIO_178, 1, DEEP), /* EN_PP3300_WLAN */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPO(GPIO_164, 0, DEEP), /* WLAN_PE_RST */</span><br><span> };</span><br><span> </span><br><span> const struct pad_config *__attribute__((weak))</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25417">change 25417</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25417"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ic51a94902e2cac3491081ade32079e5b88719f45 </div>
<div style="display:none"> Gerrit-Change-Number: 25417 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Furquan Shaikh <furquan@google.com> </div>