<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25403">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">Make Raw_Clock a variable<br><br>On GMCH the Raw_Clock depends on the FSB frequency.<br><br>Change-Id: I11af9ecb3504983ba1d3136c1b82bd14363afdba<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M common/broxton/hw-gfx-gma-power_and_clocks.adb<br>M common/haswell_shared/hw-gfx-gma-power_and_clocks_haswell.adb<br>M common/hw-gfx-gma-config.ads.template<br>M common/hw-gfx-gma-dp_aux_request.adb<br>M common/hw-gfx-gma.adb<br>M common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb<br>M common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb<br>7 files changed, 19 insertions(+), 5 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/03/25403/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/common/broxton/hw-gfx-gma-power_and_clocks.adb b/common/broxton/hw-gfx-gma-power_and_clocks.adb</span><br><span>index 12ab308..c0f3075 100644</span><br><span>--- a/common/broxton/hw-gfx-gma-power_and_clocks.adb</span><br><span>+++ b/common/broxton/hw-gfx-gma-power_and_clocks.adb</span><br><span>@@ -316,6 +316,8 @@</span><br><span> </span><br><span> Set_Mask (DBUF_CTL, DBUF_CTL_DBUF_POWER_REQUEST);</span><br><span> Wait_Set_Mask (DBUF_CTL, DBUF_CTL_DBUF_POWER_STATE);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Config.Raw_Clock := Config.Default_RawClk_Freq;</span><br><span> end Initialize;</span><br><span> </span><br><span> end HW.GFX.GMA.Power_And_Clocks;</span><br><span>diff --git a/common/haswell_shared/hw-gfx-gma-power_and_clocks_haswell.adb b/common/haswell_shared/hw-gfx-gma-power_and_clocks_haswell.adb</span><br><span>index 41d340a..c0d1e78 100644</span><br><span>--- a/common/haswell_shared/hw-gfx-gma-power_and_clocks_haswell.adb</span><br><span>+++ b/common/haswell_shared/hw-gfx-gma-power_and_clocks_haswell.adb</span><br><span>@@ -207,6 +207,7 @@</span><br><span> begin</span><br><span> -- HSW: disable power down well</span><br><span> PDW_Off;</span><br><span style="color: hsl(120, 100%, 40%);">+ Config.Raw_Clock := Config.Default_RawClk_Freq;</span><br><span> end Initialize;</span><br><span> </span><br><span> procedure Power_Set_To (Configs : Pipe_Configs) is</span><br><span>diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template</span><br><span>index 5d136b2..aa1c3cd 100644</span><br><span>--- a/common/hw-gfx-gma-config.ads.template</span><br><span>+++ b/common/hw-gfx-gma-config.ads.template</span><br><span>@@ -14,7 +14,7 @@</span><br><span> </span><br><span> private package HW.GFX.GMA.Config</span><br><span> with</span><br><span style="color: hsl(0, 100%, 40%);">- Initializes => Valid_Port_GPU</span><br><span style="color: hsl(120, 100%, 40%);">+ Initializes => (Valid_Port_GPU, Raw_Clock)</span><br><span> is</span><br><span> </span><br><span> CPU : constant CPU_Type := <<CPU>>;</span><br><span>@@ -246,6 +246,10 @@</span><br><span> when Broxton => Frequency_Type'First, -- none needed</span><br><span> when Skylake => 24_000_000);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+ Raw_Clock : Frequency_Type := Default_RawClk_Freq</span><br><span style="color: hsl(120, 100%, 40%);">+ with Part_Of => GMA.Config_State;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> ----------------------------------------------------------------------------</span><br><span> </span><br><span> -- Maximum source width with enabled scaler. This only accounts</span><br><span>diff --git a/common/hw-gfx-gma-dp_aux_request.adb b/common/hw-gfx-gma-dp_aux_request.adb</span><br><span>index 22064ab..f808dc2 100644</span><br><span>--- a/common/hw-gfx-gma-dp_aux_request.adb</span><br><span>+++ b/common/hw-gfx-gma-dp_aux_request.adb</span><br><span>@@ -19,6 +19,7 @@</span><br><span> </span><br><span> with HW.GFX.GMA.Config;</span><br><span> with HW.GFX.GMA.Registers;</span><br><span style="color: hsl(120, 100%, 40%);">+with HW.GFX.GMA.Power_And_Clocks;</span><br><span> </span><br><span> use type HW.Word8;</span><br><span> use type HW.GFX.GMA.Registers.Registers_Invalid_Index;</span><br><span>@@ -162,7 +163,7 @@</span><br><span> Success : out Boolean)</span><br><span> with</span><br><span> Global => (In_Out => Registers.Register_State,</span><br><span style="color: hsl(0, 100%, 40%);">- Input => Time.State),</span><br><span style="color: hsl(120, 100%, 40%);">+ Input => (Time.State, Config.Raw_Clock)),</span><br><span> Depends =></span><br><span> ((Registers.Register_State,</span><br><span> Response,</span><br><span>@@ -170,6 +171,7 @@</span><br><span> Success)</span><br><span> =></span><br><span> (Registers.Register_State,</span><br><span style="color: hsl(120, 100%, 40%);">+ Config.Raw_Clock,</span><br><span> Time.State,</span><br><span> Port,</span><br><span> Request,</span><br><span>@@ -232,7 +234,7 @@</span><br><span> (if Port = DP_A then</span><br><span> Word32 ((Config.Default_CDClk_Freq + 1_000_000) / 2_000_000)</span><br><span> else</span><br><span style="color: hsl(0, 100%, 40%);">- Word32 ((Config.Default_RawClk_Freq + 1_000_000) / 2_000_000))</span><br><span style="color: hsl(120, 100%, 40%);">+ Word32 ((Config.Raw_Clock + 1_000_000) / 2_000_000))</span><br><span> else 0);</span><br><span> </span><br><span> Busy : Boolean;</span><br><span>diff --git a/common/hw-gfx-gma.adb b/common/hw-gfx-gma.adb</span><br><span>index d8438ab..a4445ba 100644</span><br><span>--- a/common/hw-gfx-gma.adb</span><br><span>+++ b/common/hw-gfx-gma.adb</span><br><span>@@ -46,7 +46,7 @@</span><br><span> HPD_Delay, Wait_For_HPD,</span><br><span> Linear_FB_Base),</span><br><span> Init_State => Initialized,</span><br><span style="color: hsl(0, 100%, 40%);">- Config_State => Config.Valid_Port_GPU,</span><br><span style="color: hsl(120, 100%, 40%);">+ Config_State => (Config.Valid_Port_GPU, Config.Raw_Clock),</span><br><span> Device_State =></span><br><span> (Dev.PCI_State, Registers.Register_State, Registers.GTT_State))</span><br><span> is</span><br><span>@@ -307,7 +307,8 @@</span><br><span> Refined_Global =></span><br><span> (In_Out =></span><br><span> (Config.Valid_Port_GPU, Dev.PCI_State,</span><br><span style="color: hsl(0, 100%, 40%);">- Registers.Register_State, Port_IO.State),</span><br><span style="color: hsl(120, 100%, 40%);">+ Registers.Register_State, Port_IO.State,</span><br><span style="color: hsl(120, 100%, 40%);">+ Config.Raw_Clock),</span><br><span> Input =></span><br><span> (Time.State),</span><br><span> Output =></span><br><span>diff --git a/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb b/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb</span><br><span>index bff4750..a7b1035 100644</span><br><span>--- a/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb</span><br><span>+++ b/common/ironlake/hw-gfx-gma-power_and_clocks_ironlake.adb</span><br><span>@@ -50,6 +50,8 @@</span><br><span> Registers.Posting_Read (Registers.PCH_DREF_CONTROL);</span><br><span> Time.U_Delay (20); -- DMI latency</span><br><span> end if;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Config.Raw_Clock := Config.Default_RawClk_Freq;</span><br><span> end Initialize;</span><br><span> </span><br><span> end HW.GFX.GMA.Power_And_Clocks_Ironlake;</span><br><span>diff --git a/common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb b/common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb</span><br><span>index e79ea87..ea84992 100644</span><br><span>--- a/common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb</span><br><span>+++ b/common/skylake/hw-gfx-gma-power_and_clocks_skylake.adb</span><br><span>@@ -315,6 +315,8 @@</span><br><span> (Register => Registers.DBUF_CTL,</span><br><span> Mask => DBUF_CTL_DBUF_POWER_STATE);</span><br><span> end if;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Config.Raw_Clock := Config.Default_RawClk_Freq;</span><br><span> end Initialize;</span><br><span> </span><br><span> procedure Power_Set_To (Configs : Pipe_Configs) is</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25403">change 25403</a>. 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<div style="display:none"> Gerrit-Project: libgfxinit </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I11af9ecb3504983ba1d3136c1b82bd14363afdba </div>
<div style="display:none"> Gerrit-Change-Number: 25403 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>