<p>Matt DeVillier has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25323">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">purism/librem_skl: Set TCC Activation at 95C<br><br>Set the Thermal Control Circuit (TCC) activaction value to 95C<br>even though FSP integration guide says to set it to 100C for SKL-U<br>(offset at 0), because when the TCC activates at 100C, the CPU<br>will have already shut itself down from overheating protection.<br><br>This was tested on Purism Librem 13 v2. A bisect showed that the<br>immediate shutdowns happened after commit [1] was merged which led<br>to this solution.<br><br>[1] ec5a947b (soc/intel/skylake: make tcc_offset take effect)<br><br>Change-Id: Idfc001c8e46ed3b07b24150c961c4b9bc9b71a62<br>Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm><br>Signed-off-by: Matt DeVillier <matt.devillier@gmail.com><br>---<br>M src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb<br>M src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb<br>2 files changed, 12 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/25323/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb</span><br><span>index 9ce1d91..159d921 100644</span><br><span>--- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb</span><br><span>+++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb</span><br><span>@@ -10,6 +10,12 @@</span><br><span>         register "eist_enable" = "1"</span><br><span>     register "VmxEnable" = "1"</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+    # Set the Thermal Control Circuit (TCC) activaction value to 95C</span><br><span style="color: hsl(120, 100%, 40%);">+      # even though FSP integration guide says to set it to 100C for SKL-U</span><br><span style="color: hsl(120, 100%, 40%);">+  # (offset at 0), because when the TCC activates at 100C, the CPU</span><br><span style="color: hsl(120, 100%, 40%);">+      # will have already shut itself down from overheating protection.</span><br><span style="color: hsl(120, 100%, 40%);">+     register "tcc_offset" = "5" # TCC of 95C</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>       # GPE configuration</span><br><span>  # Note that GPE events called out in ASL code rely on this</span><br><span>   # route. i.e. If this route changes then the affected GPE</span><br><span>diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb</span><br><span>index ac082e6..035db18 100644</span><br><span>--- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb</span><br><span>+++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb</span><br><span>@@ -10,6 +10,12 @@</span><br><span>      register "eist_enable" = "1"</span><br><span>     register "VmxEnable" = "1"</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+    # Set the Thermal Control Circuit (TCC) activaction value to 95C</span><br><span style="color: hsl(120, 100%, 40%);">+      # even though FSP integration guide says to set it to 100C for SKL-U</span><br><span style="color: hsl(120, 100%, 40%);">+  # (offset at 0), because when the TCC activates at 100C, the CPU</span><br><span style="color: hsl(120, 100%, 40%);">+      # will have already shut itself down from overheating protection.</span><br><span style="color: hsl(120, 100%, 40%);">+     register "tcc_offset" = "5" # TCC of 95C</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>       # GPE configuration</span><br><span>  # Note that GPE events called out in ASL code rely on this</span><br><span>   # route. i.e. If this route changes then the affected GPE</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25323">change 25323</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25323"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Idfc001c8e46ed3b07b24150c961c4b9bc9b71a62 </div>
<div style="display:none"> Gerrit-Change-Number: 25323 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Matt DeVillier <matt.devillier@gmail.com> </div>