<p>Marshall Dawson has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25300">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">amd/stoneyridge: Add PM1 wake status to boot log<br><br>Print the wake status bits to the console. The format is kept similar<br>to Intel's to maintain compatilibity with inspection utilities. Add<br>relevant wake events from the register to the ELOG. Clear the register<br>before continuing.<br><br>TEST=Inspect console and ELOG for Grunt<br>BUG=b:75020968<br><br>Change-Id: Idc9d12326abb290e4f7a5c60677eb6e057d475b2<br>---<br>M src/soc/amd/stoneyridge/southbridge.c<br>1 file changed, 71 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/25300/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c</span><br><span>index bb3157d..c27b9e3 100644</span><br><span>--- a/src/soc/amd/stoneyridge/southbridge.c</span><br><span>+++ b/src/soc/amd/stoneyridge/southbridge.c</span><br><span>@@ -23,6 +23,7 @@</span><br><span> #include <device/pci_ids.h></span><br><span> #include <device/pci_ops.h></span><br><span> #include <cbmem.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <elog.h></span><br><span> #include <amdblocks/amd_pci_util.h></span><br><span> #include <soc/southbridge.h></span><br><span> #include <soc/smi.h></span><br><span>@@ -612,9 +613,79 @@</span><br><span> PM_ACPI_TIMER_EN_EN);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+static void print_num_status_bits(int num_bits, uint32_t status,</span><br><span style="color: hsl(120, 100%, 40%);">+ const char *const bit_names[])</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ int i;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (!status)</span><br><span style="color: hsl(120, 100%, 40%);">+ return;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ for (i = num_bits - 1; i >= 0; i--) {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (status & (1 << i)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (bit_names[i])</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "%s ", bit_names[i]);</span><br><span style="color: hsl(120, 100%, 40%);">+ else</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "BIT%d ", i);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static uint16_t reset_pm1_status(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ uint16_t pm1_sts = inw(ACPI_PM_EVT_BLK);</span><br><span style="color: hsl(120, 100%, 40%);">+ outw(pm1_sts, ACPI_PM_EVT_BLK);</span><br><span style="color: hsl(120, 100%, 40%);">+ return pm1_sts;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static uint16_t print_pm1_status(uint16_t pm1_sts)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ static const char *const pm1_sts_bits[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ [0] = "TMROF",</span><br><span style="color: hsl(120, 100%, 40%);">+ [4] = "BMSTATUS",</span><br><span style="color: hsl(120, 100%, 40%);">+ [5] = "GBL",</span><br><span style="color: hsl(120, 100%, 40%);">+ [8] = "PWRBTN",</span><br><span style="color: hsl(120, 100%, 40%);">+ [10] = "RTC",</span><br><span style="color: hsl(120, 100%, 40%);">+ [14] = "PCIEXPWAK",</span><br><span style="color: hsl(120, 100%, 40%);">+ [15] = "WAK",</span><br><span style="color: hsl(120, 100%, 40%);">+ };</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (!pm1_sts)</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_SPEW, "PM1_STS: ");</span><br><span style="color: hsl(120, 100%, 40%);">+ print_num_status_bits(ARRAY_SIZE(pm1_sts_bits), pm1_sts, pm1_sts_bits);</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_SPEW, "\n");</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return pm1_sts;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void sb_log_pm1_status(uint16_t pm1_sts)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ if (!IS_ENABLED(CONFIG_ELOG))</span><br><span style="color: hsl(120, 100%, 40%);">+ return;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (pm1_sts & PWRBTN_STS)</span><br><span style="color: hsl(120, 100%, 40%);">+ elog_add_event_wake(ELOG_WAKE_SOURCE_PWRBTN, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (pm1_sts & RTC_STS)</span><br><span style="color: hsl(120, 100%, 40%);">+ elog_add_event_wake(ELOG_WAKE_SOURCE_RTC, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (pm1_sts & PCIEXPWAK_STS)</span><br><span style="color: hsl(120, 100%, 40%);">+ elog_add_event_wake(ELOG_WAKE_SOURCE_PCIE, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void sb_clear_pm1_status(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ uint16_t pm1_sts = reset_pm1_status();</span><br><span style="color: hsl(120, 100%, 40%);">+ sb_log_pm1_status(pm1_sts);</span><br><span style="color: hsl(120, 100%, 40%);">+ print_pm1_status(pm1_sts);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> void southbridge_init(void *chip_info)</span><br><span> {</span><br><span> sb_init_acpi_ports();</span><br><span style="color: hsl(120, 100%, 40%);">+ sb_clear_pm1_status();</span><br><span> }</span><br><span> </span><br><span> void southbridge_final(void *chip_info)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25300">change 25300</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25300"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Idc9d12326abb290e4f7a5c60677eb6e057d475b2 </div>
<div style="display:none"> Gerrit-Change-Number: 25300 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marshall Dawson <marshalldawson3rd@gmail.com> </div>
<div style="display:none"> Gerrit-Reviewer: Marshall Dawson <marshall.dawson@scarletltd.com> </div>