<p>Bora Guvendik has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25290">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">[WIP]soc/intel/cannonlake: Clear EMMC timeout for USB boot<br><br>Clear EMMC timeout register to avoid EMMC issue according to cannonlake<br>bios writer guide. _PS0 is not called by OS during USB boot but OS still<br>initializes emmc. Add _INI to cover USB boot case.<br><br>BUG=b.71586766<br>TEST=Install OS into EMMC<br><br>Change-Id: I4eef23f637f781b709696951c5bd825530cc1d11<br>Signed-off-by: Bora Guvendik <bora.guvendik@intel.com><br>---<br>M src/soc/intel/cannonlake/acpi/scs.asl<br>1 file changed, 13 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/25290/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/cannonlake/acpi/scs.asl b/src/soc/intel/cannonlake/acpi/scs.asl</span><br><span>index 4062e70..7e9195a 100644</span><br><span>--- a/src/soc/intel/cannonlake/acpi/scs.asl</span><br><span>+++ b/src/soc/intel/cannonlake/acpi/scs.asl</span><br><span>@@ -31,6 +31,12 @@</span><br><span>                   PGEN, 1,        /* PG_ENABLE */</span><br><span>              }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+         Method(_INI) {</span><br><span style="color: hsl(120, 100%, 40%);">+                        /* Clear register 0x1C20/0x4820 */</span><br><span style="color: hsl(120, 100%, 40%);">+                        ^^PCRA (PID_EMMC, 0x1C20, 0x0)</span><br><span style="color: hsl(120, 100%, 40%);">+                        ^^PCRA (PID_EMMC, 0x4820, 0x0)</span><br><span style="color: hsl(120, 100%, 40%);">+            }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>          Method(_PS0, 0, Serialized) {</span><br><span>                        Stall (50) // Sleep 50 us</span><br><span> </span><br><span>@@ -80,6 +86,13 @@</span><br><span>                   PGEN, 1,        /* PG_ENABLE */</span><br><span>              }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+         Method(_INI)</span><br><span style="color: hsl(120, 100%, 40%);">+          {</span><br><span style="color: hsl(120, 100%, 40%);">+                     /* Clear register 0x1C20/0x4820 */</span><br><span style="color: hsl(120, 100%, 40%);">+                    ^^PCRA (PID_SDX, 0x1C20, 0x0)</span><br><span style="color: hsl(120, 100%, 40%);">+                 ^^PCRA (PID_SDX, 0x4820, 0x0)</span><br><span style="color: hsl(120, 100%, 40%);">+         }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>          Method (_PS0, 0, Serialized)</span><br><span>                 {</span><br><span>                    Store (0, PGEN) /* Disable PG */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25290">change 25290</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25290"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I4eef23f637f781b709696951c5bd825530cc1d11 </div>
<div style="display:none"> Gerrit-Change-Number: 25290 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Bora Guvendik <bora.guvendik@intel.com> </div>