<p>Kin Wai Ng would like Naresh Solanki, Subrata Banik, Balaji Manigandan, Aamir Bohra, Maulik V Vaghela and Rizwan Qureshi to <strong>review</strong> this change.</p><p><a href="https://review.coreboot.org/25224">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/coffeelake: Include Coffeelake Device Ids<br><br>Add Coffeelake specific CPU, System Agent, PCH, IGD Device ID, etc.<br><br>Change-Id: Ia8417199205c26b9147f7b04a2418ca22ffc188b<br>Signed-off-by: Ng Kin Wai <kin.wai.ng@intel.com><br>---<br>M src/include/device/pci_ids.h<br>M src/soc/intel/coffeelake/bootblock/report_platform.c<br>M src/soc/intel/common/block/cpu/mp_init.c<br>M src/soc/intel/common/block/cse/cse.c<br>M src/soc/intel/common/block/dsp/dsp.c<br>M src/soc/intel/common/block/graphics/graphics.c<br>M src/soc/intel/common/block/i2c/i2c.c<br>M src/soc/intel/common/block/include/intelblocks/mp_init.h<br>M src/soc/intel/common/block/lpc/lpc.c<br>M src/soc/intel/common/block/p2sb/p2sb.c<br>M src/soc/intel/common/block/pcie/pcie.c<br>M src/soc/intel/common/block/sata/sata.c<br>M src/soc/intel/common/block/scs/sd.c<br>M src/soc/intel/common/block/smbus/smbus.c<br>M src/soc/intel/common/block/systemagent/systemagent.c<br>M src/soc/intel/common/block/uart/uart.c<br>M src/soc/intel/common/block/xdci/xdci.c<br>M src/soc/intel/common/block/xhci/xhci.c<br>18 files changed, 82 insertions(+), 18 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/25224/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index c184383..cd534f9</span><br><span>--- a/src/include/device/pci_ids.h</span><br><span>+++ b/src/include/device/pci_ids.h</span><br><span>@@ -2682,6 +2682,8 @@</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_BASE_U_LPC 0x9d85</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_U_PREMIUM_LPC 0x9d84</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_Y_PREMIUM_LPC 0x9d83</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_LPC_Q370 0xa306</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_LPC_QM370 0xa30c</span><br><span> </span><br><span> /* Intel PCIE device ids */</span><br><span> #define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP1 0x9d10</span><br><span>@@ -2760,6 +2762,23 @@</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP15 0x9db6</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP16 0x9db7</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP1 0xa338</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP2 0xa339</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP3 0xa33a</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP4 0xa33b</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP5 0xa33c</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP6 0xa33d</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP7 0xa33e</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP8 0xa33f</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP9 0xa330</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP10 0xa331</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP11 0xa332</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP12 0xa333</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP13 0xa334</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP14 0xa335</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP15 0xa336</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP16 0xa337</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /* Intel SATA device Ids */</span><br><span> #define PCI_DEVICE_ID_INTEL_SPT_U_SATA 0x9d03</span><br><span> #define PCI_DEVICE_ID_INTEL_SPT_U_Y_PREMIUM_SATA 0x9d07</span><br><span>@@ -2769,6 +2788,7 @@</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_SATA 0x9dd5</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_PREMIUM_SATA 0x9dd7</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_COMPAT_SATA 0x282a</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_SATA 0xa352</span><br><span> </span><br><span> /* Intel PMC device Ids */</span><br><span> #define PCI_DEVICE_ID_INTEL_SPT_LP_PMC 0x9d21</span><br><span>@@ -2777,6 +2797,7 @@</span><br><span> #define PCI_DEVICE_ID_INTEL_APL_PMC 0x5a94</span><br><span> #define PCI_DEVICE_ID_INTEL_GLK_PMC 0x3194</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_PMC 0x9da1</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_PMC 0xa321</span><br><span> </span><br><span> /* Intel I2C device Ids */</span><br><span> #define PCI_DEVICE_ID_INTEL_SPT_I2C0 0x9d60</span><br><span>@@ -2811,6 +2832,10 @@</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_I2C3 0x9deb</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_I2C4 0x9dc5</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_I2C5 0x9dc6</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_I2C0 0xa368</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_I2C1 0xa369</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_I2C2 0xa36a</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_I2C3 0xa36b</span><br><span> </span><br><span> /* Intel UART device Ids */</span><br><span> #define PCI_DEVICE_ID_INTEL_SPT_UART0 0x9d27</span><br><span>@@ -2833,6 +2858,9 @@</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_UART0 0x9da8</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_UART1 0x9da9</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_UART2 0x9dc7</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_UART0 0xa328</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_UART1 0xa329</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_UART2 0xa347</span><br><span> </span><br><span> /* Intel SPI device Ids */</span><br><span> #define PCI_DEVICE_ID_INTEL_SPT_SPI1 0x9d24</span><br><span>@@ -2875,6 +2903,7 @@</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_2 0x5A5A</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_3 0x5A42</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_4 0x5A4A</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CFL_H 0x3e9b</span><br><span> </span><br><span> /* Intel Northbridge Ids */</span><br><span> #define PCI_DEVICE_ID_INTEL_APL_NB 0x5af0</span><br><span>@@ -2891,12 +2920,14 @@</span><br><span> #define PCI_DEVICE_ID_INTEL_KBL_ID_DT 0x591f</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_ID_U 0x5A04</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_ID_Y 0x5A02</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_ID_H 0x3ec4</span><br><span> </span><br><span> /* Intel SMBUS device Ids */</span><br><span> #define PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS 0x9d23</span><br><span> #define PCI_DEVICE_ID_INTEL_SPT_H_SMBUS 0xa123</span><br><span> #define PCI_DEVICE_ID_INTEL_KBP_H_SMBUS 0xa1a3</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_SMBUS 0x9da3</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_SMBUS 0xa323</span><br><span> </span><br><span> /* Intel XHCI device Ids */</span><br><span> #define PCI_DEVICE_ID_INTEL_APL_XHCI 0x5aa8</span><br><span>@@ -2905,16 +2936,19 @@</span><br><span> #define PCI_DEVICE_ID_INTEL_SPT_H_XHCI 0xa12f</span><br><span> #define PCI_DEVICE_ID_INTEL_KBP_H_XHCI 0xa2af</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_LP_XHCI 0x9ded</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNP_H_XHCI 0xa36d</span><br><span> </span><br><span> /* Intel P2SB device Ids */</span><br><span> #define PCI_DEVICE_ID_INTEL_APL_P2SB 0x5a92</span><br><span> #define PCI_DEVICE_ID_INTEL_GLK_P2SB 0x3192</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_P2SB 0x9da0</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_P2SB 0xa320</span><br><span> </span><br><span> /* Intel SRAM device Ids */</span><br><span> #define PCI_DEVICE_ID_INTEL_APL_SRAM 0x5aec</span><br><span> #define PCI_DEVICE_ID_INTEL_GLK_SRAM 0x31ec</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_SRAM 0x9def</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_SRAM 0xa36f</span><br><span> </span><br><span> /* Intel AUDIO device Ids */</span><br><span> #define PCI_DEVICE_ID_INTEL_APL_AUDIO 0x5a98</span><br><span>@@ -2922,24 +2956,28 @@</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_AUDIO 0x9dc8</span><br><span> #define PCI_DEVICE_ID_INTEL_SKL_AUDIO 0x9d70</span><br><span> #define PCI_DEVICE_ID_INTEL_KBL_AUDIO 0x9d71</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_AUDIO 0xa348</span><br><span> </span><br><span> /* Intel HECI/ME device Ids */</span><br><span> #define PCI_DEVICE_ID_INTEL_APL_CSE0 0x5a9a</span><br><span> #define PCI_DEVICE_ID_INTEL_GLK_CSE0 0x319a</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_CSE0 0x9de0</span><br><span> #define PCI_DEVICE_ID_INTEL_SKL_CSE0 0x9d3a</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_CSE0 0xa360</span><br><span> </span><br><span> /* Intel XDCI device Ids */</span><br><span> #define PCI_DEVICE_ID_INTEL_APL_XDCI 0x5aaa</span><br><span> #define PCI_DEVICE_ID_INTEL_GLK_XDCI 0x31aa</span><br><span> #define PCI_DEVICE_ID_INTEL_SPT_LP_XDCI 0x9d30</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_LP_XDCI 0x9dee</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_XDCI 0xa36e</span><br><span> </span><br><span> /* Intel SD device Ids */</span><br><span> #define PCI_DEVICE_ID_INTEL_APL_SD 0x5aca</span><br><span> #define PCI_DEVICE_ID_INTEL_GLK_SD 0x31ca</span><br><span> #define PCI_DEVICE_ID_INTEL_SKL_SD 0x9d2d</span><br><span> #define PCI_DEVICE_ID_INTEL_CNL_SD 0x9df5</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_INTEL_CNL_H_SD 0xa375</span><br><span> </span><br><span> /* Intel EMMC device Ids */</span><br><span> #define PCI_DEVICE_ID_INTEL_SKL_EMMC 0x9d2b</span><br><span>@@ -2952,6 +2990,8 @@</span><br><span> #define PCH_CNL_LP_U_PREMIUM 0x9d84</span><br><span> #define PCH_CNL_LP_U_BASE 0x9d85</span><br><span> #define PCH_CNL_H_DT_SUPER 0xa280</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCH_CNL_H_MOBILE_Q370 0xa306</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCH_CNL_H_MOBILE_QM370 0xa30c</span><br><span> </span><br><span> #define PCI_VENDOR_ID_COMPUTONE 0x8e0e</span><br><span> #define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291</span><br><span>diff --git a/src/soc/intel/coffeelake/bootblock/report_platform.c b/src/soc/intel/coffeelake/bootblock/report_platform.c</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index c37f475..4748004</span><br><span>--- a/src/soc/intel/coffeelake/bootblock/report_platform.c</span><br><span>+++ b/src/soc/intel/coffeelake/bootblock/report_platform.c</span><br><span>@@ -32,41 +32,29 @@</span><br><span> u32 cpuid;</span><br><span> const char *name;</span><br><span> } cpu_table[] = {</span><br><span style="color: hsl(0, 100%, 40%);">- { CPUID_CANNONLAKE_A0, "Cannonlake A0" },</span><br><span style="color: hsl(0, 100%, 40%);">- { CPUID_CANNONLAKE_B0, "Cannonlake B0" },</span><br><span style="color: hsl(0, 100%, 40%);">- { CPUID_CANNONLAKE_C0, "Cannonlake C0" },</span><br><span style="color: hsl(0, 100%, 40%);">- { CPUID_CANNONLAKE_D0, "Cannonlake D0" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { CPUID_COFFEELAKE_A0, "Coffeelake A0" },</span><br><span> };</span><br><span> </span><br><span> static struct {</span><br><span> u16 mchid;</span><br><span> const char *name;</span><br><span> } mch_table[] = {</span><br><span style="color: hsl(0, 100%, 40%);">- { PCI_DEVICE_ID_INTEL_CNL_ID_U, "Cannonlake-U" },</span><br><span style="color: hsl(0, 100%, 40%);">- { PCI_DEVICE_ID_INTEL_CNL_ID_Y, "Cannonlake-Y" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { PCI_DEVICE_ID_INTEL_CNL_ID_H, "CoffeeLake Halo (6+2)" },</span><br><span> };</span><br><span> </span><br><span> static struct {</span><br><span> u16 lpcid;</span><br><span> const char *name;</span><br><span> } pch_table[] = {</span><br><span style="color: hsl(0, 100%, 40%);">- { PCI_DEVICE_ID_INTEL_CNL_BASE_U_LPC, "Cannonlake-U Base" },</span><br><span style="color: hsl(0, 100%, 40%);">- { PCI_DEVICE_ID_INTEL_CNL_U_PREMIUM_LPC, "Cannonlake-U Premium" },</span><br><span style="color: hsl(0, 100%, 40%);">- { PCI_DEVICE_ID_INTEL_CNL_Y_PREMIUM_LPC, "Cannonlake-Y Premium" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { PCI_DEVICE_ID_INTEL_CNL_H_LPC_Q370, "Coffeelake-H" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { PCI_DEVICE_ID_INTEL_CNL_H_LPC_QM370, "Coffeelake-H" },</span><br><span> };</span><br><span> </span><br><span> static struct {</span><br><span> u16 igdid;</span><br><span> const char *name;</span><br><span> } igd_table[] = {</span><br><span style="color: hsl(0, 100%, 40%);">- { PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_1, "Cannonlake ULX GT2" },</span><br><span style="color: hsl(0, 100%, 40%);">- { PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_2, "Cannonlake ULX GT1.5" },</span><br><span style="color: hsl(0, 100%, 40%);">- { PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_3, "Cannonlake ULX GT1" },</span><br><span style="color: hsl(0, 100%, 40%);">- { PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_4, "Cannonlake ULX GT0.5" },</span><br><span style="color: hsl(0, 100%, 40%);">- { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_1, "Cannonlake ULT GT2" },</span><br><span style="color: hsl(0, 100%, 40%);">- { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_2, "Cannonlake ULT GT1.5" },</span><br><span style="color: hsl(0, 100%, 40%);">- { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_3, "Cannonlake ULT GT1" },</span><br><span style="color: hsl(0, 100%, 40%);">- { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_4, "Cannonlake ULT GT0.5" },</span><br><span style="color: hsl(120, 100%, 40%);">+ { PCI_DEVICE_ID_INTEL_CFL_H, "Coffeelake H" },</span><br><span> };</span><br><span> </span><br><span> static uint8_t get_dev_revision(device_t dev)</span><br><span>diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index 085a340..40086e4</span><br><span>--- a/src/soc/intel/common/block/cpu/mp_init.c</span><br><span>+++ b/src/soc/intel/common/block/cpu/mp_init.c</span><br><span>@@ -69,6 +69,7 @@</span><br><span> { X86_VENDOR_INTEL, CPUID_APOLLOLAKE_E0 },</span><br><span> { X86_VENDOR_INTEL, CPUID_GLK_A0 },</span><br><span> { X86_VENDOR_INTEL, CPUID_GLK_B0 },</span><br><span style="color: hsl(120, 100%, 40%);">+ { X86_VENDOR_INTEL, CPUID_COFFEELAKE_A0 },</span><br><span> { 0, 0 },</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index 4991db6..d57cb7f</span><br><span>--- a/src/soc/intel/common/block/cse/cse.c</span><br><span>+++ b/src/soc/intel/common/block/cse/cse.c</span><br><span>@@ -514,6 +514,7 @@</span><br><span> PCI_DEVICE_ID_INTEL_GLK_CSE0,</span><br><span> PCI_DEVICE_ID_INTEL_CNL_CSE0,</span><br><span> PCI_DEVICE_ID_INTEL_SKL_CSE0,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_CSE0,</span><br><span> 0,</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/soc/intel/common/block/dsp/dsp.c b/src/soc/intel/common/block/dsp/dsp.c</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index 365fab7..2b11cd8</span><br><span>--- a/src/soc/intel/common/block/dsp/dsp.c</span><br><span>+++ b/src/soc/intel/common/block/dsp/dsp.c</span><br><span>@@ -31,6 +31,7 @@</span><br><span> PCI_DEVICE_ID_INTEL_CNL_AUDIO,</span><br><span> PCI_DEVICE_ID_INTEL_GLK_AUDIO,</span><br><span> PCI_DEVICE_ID_INTEL_SKL_AUDIO,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_AUDIO,</span><br><span> 0,</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index dcf8200..fa63477</span><br><span>--- a/src/soc/intel/common/block/graphics/graphics.c</span><br><span>+++ b/src/soc/intel/common/block/graphics/graphics.c</span><br><span>@@ -128,6 +128,7 @@</span><br><span> PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM,</span><br><span> PCI_DEVICE_ID_INTEL_SKL_GT2_SWKSM,</span><br><span> PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CFL_H,</span><br><span> 0,</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/soc/intel/common/block/i2c/i2c.c b/src/soc/intel/common/block/i2c/i2c.c</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index 7dd40db..95b5bae</span><br><span>--- a/src/soc/intel/common/block/i2c/i2c.c</span><br><span>+++ b/src/soc/intel/common/block/i2c/i2c.c</span><br><span>@@ -93,6 +93,10 @@</span><br><span> PCI_DEVICE_ID_INTEL_GLK_I2C5,</span><br><span> PCI_DEVICE_ID_INTEL_GLK_I2C6,</span><br><span> PCI_DEVICE_ID_INTEL_GLK_I2C7,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_I2C0,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_I2C1,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_I2C2,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_I2C3,</span><br><span> 0,</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index 3057209..d9336b9</span><br><span>--- a/src/soc/intel/common/block/include/intelblocks/mp_init.h</span><br><span>+++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h</span><br><span>@@ -37,6 +37,7 @@</span><br><span> #define CPUID_APOLLOLAKE_E0 0x506ca</span><br><span> #define CPUID_GLK_A0 0x706a0</span><br><span> #define CPUID_GLK_B0 0x706a1</span><br><span style="color: hsl(120, 100%, 40%);">+#define CPUID_COFFEELAKE_A0 0x906ea</span><br><span> </span><br><span> /*</span><br><span> * MP Init callback function to Find CPU Topology. This function is common</span><br><span>diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index 2efdc8d..b525ef8</span><br><span>--- a/src/soc/intel/common/block/lpc/lpc.c</span><br><span>+++ b/src/soc/intel/common/block/lpc/lpc.c</span><br><span>@@ -140,6 +140,8 @@</span><br><span> PCI_DEVICE_ID_INTEL_CNL_BASE_U_LPC,</span><br><span> PCI_DEVICE_ID_INTEL_CNL_U_PREMIUM_LPC,</span><br><span> PCI_DEVICE_ID_INTEL_CNL_Y_PREMIUM_LPC,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_LPC_Q370,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_LPC_QM370,</span><br><span> 0</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index 6a9bd34..23e279e</span><br><span>--- a/src/soc/intel/common/block/p2sb/p2sb.c</span><br><span>+++ b/src/soc/intel/common/block/p2sb/p2sb.c</span><br><span>@@ -71,6 +71,7 @@</span><br><span> PCI_DEVICE_ID_INTEL_APL_P2SB,</span><br><span> PCI_DEVICE_ID_INTEL_GLK_P2SB,</span><br><span> PCI_DEVICE_ID_INTEL_CNL_P2SB,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_P2SB,</span><br><span> 0,</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/soc/intel/common/block/pcie/pcie.c b/src/soc/intel/common/block/pcie/pcie.c</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index 7d383fd..74f21e6</span><br><span>--- a/src/soc/intel/common/block/pcie/pcie.c</span><br><span>+++ b/src/soc/intel/common/block/pcie/pcie.c</span><br><span>@@ -165,6 +165,22 @@</span><br><span> PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP14,</span><br><span> PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP15,</span><br><span> PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP16,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP1,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP2,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP3,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP4,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP5,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP6,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP7,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP8,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP9,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP10,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP11,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP12,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP13,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP14,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP15,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_PCIE_RP16,</span><br><span> 0</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/soc/intel/common/block/sata/sata.c b/src/soc/intel/common/block/sata/sata.c</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index cabe895..b3e0672</span><br><span>--- a/src/soc/intel/common/block/sata/sata.c</span><br><span>+++ b/src/soc/intel/common/block/sata/sata.c</span><br><span>@@ -76,6 +76,7 @@</span><br><span> PCI_DEVICE_ID_INTEL_CNL_SATA,</span><br><span> PCI_DEVICE_ID_INTEL_CNL_PREMIUM_SATA,</span><br><span> PCI_DEVICE_ID_INTEL_CNL_COMPAT_SATA,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_SATA,</span><br><span> 0</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/soc/intel/common/block/scs/sd.c b/src/soc/intel/common/block/scs/sd.c</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index 66eaddf5..7d2bfb0</span><br><span>--- a/src/soc/intel/common/block/scs/sd.c</span><br><span>+++ b/src/soc/intel/common/block/scs/sd.c</span><br><span>@@ -69,6 +69,7 @@</span><br><span> PCI_DEVICE_ID_INTEL_CNL_SD,</span><br><span> PCI_DEVICE_ID_INTEL_GLK_SD,</span><br><span> PCI_DEVICE_ID_INTEL_SKL_SD,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_SD,</span><br><span> 0</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index 3793025..f27a53b</span><br><span>--- a/src/soc/intel/common/block/smbus/smbus.c</span><br><span>+++ b/src/soc/intel/common/block/smbus/smbus.c</span><br><span>@@ -91,7 +91,7 @@</span><br><span> PCI_DEVICE_ID_INTEL_CNL_SMBUS,</span><br><span> PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS,</span><br><span> PCI_DEVICE_ID_INTEL_SPT_H_SMBUS,</span><br><span style="color: hsl(0, 100%, 40%);">- PCI_DEVICE_ID_INTEL_KBP_H_SMBUS,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_SMBUS,</span><br><span> 0</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index 027222b..4be9cae</span><br><span>--- a/src/soc/intel/common/block/systemagent/systemagent.c</span><br><span>+++ b/src/soc/intel/common/block/systemagent/systemagent.c</span><br><span>@@ -299,6 +299,7 @@</span><br><span> PCI_DEVICE_ID_INTEL_KBL_ID_H,</span><br><span> PCI_DEVICE_ID_INTEL_KBL_U_R,</span><br><span> PCI_DEVICE_ID_INTEL_KBL_ID_DT,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_ID_H,</span><br><span> 0</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index 9f26ef1..582d5cf</span><br><span>--- a/src/soc/intel/common/block/uart/uart.c</span><br><span>+++ b/src/soc/intel/common/block/uart/uart.c</span><br><span>@@ -168,6 +168,9 @@</span><br><span> PCI_DEVICE_ID_INTEL_GLK_UART1,</span><br><span> PCI_DEVICE_ID_INTEL_GLK_UART2,</span><br><span> PCI_DEVICE_ID_INTEL_GLK_UART3,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_UART0,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_UART1,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_UART2,</span><br><span> 0,</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/soc/intel/common/block/xdci/xdci.c b/src/soc/intel/common/block/xdci/xdci.c</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index 10e6f0d..6a61d5e</span><br><span>--- a/src/soc/intel/common/block/xdci/xdci.c</span><br><span>+++ b/src/soc/intel/common/block/xdci/xdci.c</span><br><span>@@ -35,6 +35,7 @@</span><br><span> PCI_DEVICE_ID_INTEL_CNL_LP_XDCI,</span><br><span> PCI_DEVICE_ID_INTEL_GLK_XDCI,</span><br><span> PCI_DEVICE_ID_INTEL_SPT_LP_XDCI,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNL_H_XDCI,</span><br><span> 0</span><br><span> };</span><br><span> </span><br><span>diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c</span><br><span>old mode 100644</span><br><span>new mode 100755</span><br><span>index e5a4f9b..dd11e83</span><br><span>--- a/src/soc/intel/common/block/xhci/xhci.c</span><br><span>+++ b/src/soc/intel/common/block/xhci/xhci.c</span><br><span>@@ -37,6 +37,7 @@</span><br><span> PCI_DEVICE_ID_INTEL_SPT_LP_XHCI,</span><br><span> PCI_DEVICE_ID_INTEL_SPT_H_XHCI,</span><br><span> PCI_DEVICE_ID_INTEL_KBP_H_XHCI,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_CNP_H_XHCI,</span><br><span> 0</span><br><span> };</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25224">change 25224</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25224"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ia8417199205c26b9147f7b04a2418ca22ffc188b </div>
<div style="display:none"> Gerrit-Change-Number: 25224 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Kin Wai Ng <kin.wai.ng@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Aamir Bohra <aamir.bohra@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Naresh Solanki <naresh.solanki@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Subrata Banik <subrata.banik@intel.com> </div>