<p>Richard Spiegel has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25192">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/amd/stoneyridge/southbridge.c: Upgrade UART GPIO programming<br><br>Procedure configure_stoneyridge_uart() uses direct GPIO mux programming.<br>Replace old style direct mux GPIO programming with a GPIO table and a call<br>to centralized GPIO programming.<br><br>BUG=b:74258015<br>TEST=Build and boot kahlee, observing serial output does not changes from<br>previous serial output.<br><br>Change-Id: Ie67051d7b90fa294090f6bfc518c6c074d98cc98<br>Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com><br>---<br>M src/soc/amd/stoneyridge/southbridge.c<br>1 file changed, 8 insertions(+), 4 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/25192/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c</span><br><span>index a41ad1b..cce87e3 100644</span><br><span>--- a/src/soc/amd/stoneyridge/southbridge.c</span><br><span>+++ b/src/soc/amd/stoneyridge/southbridge.c</span><br><span>@@ -331,13 +331,17 @@</span><br><span>   } while (!status);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+const static struct soc_amd_stoneyridge_gpio uart_gpio[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+     PAD_NF(GPIO_137, UART0_RTS_L, PULL_NONE),</span><br><span style="color: hsl(120, 100%, 40%);">+     PAD_NF(GPIO_138, UART0_TXD, PULL_NONE),</span><br><span style="color: hsl(120, 100%, 40%);">+       PAD_NF(GPIO_142, UART1_RTS_L, PULL_NONE),</span><br><span style="color: hsl(120, 100%, 40%);">+     PAD_NF(GPIO_143, UART1_TXD, PULL_NONE)</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> void configure_stoneyridge_uart(void)</span><br><span> {</span><br><span>   /* Set the GPIO mux to UART */</span><br><span style="color: hsl(0, 100%, 40%);">-  write8((void *)FCH_IOMUXx89_UART0_RTS_L_EGPIO137, 0);</span><br><span style="color: hsl(0, 100%, 40%);">-   write8((void *)FCH_IOMUXx8A_UART0_TXD_EGPIO138, 0);</span><br><span style="color: hsl(0, 100%, 40%);">-     write8((void *)FCH_IOMUXx8E_UART1_RTS_L_EGPIO142, 0);</span><br><span style="color: hsl(0, 100%, 40%);">-   write8((void *)FCH_IOMUXx8F_UART1_TXD_EGPIO143, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+   sb_program_gpios(uart_gpio, ARRAY_SIZE(uart_gpio));</span><br><span> }</span><br><span> </span><br><span> void sb_pci_port80(void)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25192">change 25192</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25192"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ie67051d7b90fa294090f6bfc518c6c074d98cc98 </div>
<div style="display:none"> Gerrit-Change-Number: 25192 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Richard Spiegel <richard.spiegel@silverbackltd.com> </div>