<p>Barnali Sarkar would like Subrata Banik to <strong>review</strong> this change.</p><p><a href="https://review.coreboot.org/25188">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">intel/common/block/emmc: Add intel common EMMC init code over AP<br><br>This patch adds new block to do multi-threaded EMMC controller<br>initialization code. Thus on selecting this block from SOC, EMMC<br>controller init code will get executed in parallel thread, without<br>disturbing the already running code in BSP.<br><br>This is done to save around 100-300 msecs of booting time for<br>emmc initialization depending on different booting scenarios.<br><br>BUG=none<br>BRANCH=none<br>TEST=Done 3K Stability Test in Soraka (SKL) to see the boot time<br>optimizations in the following scenarios -<br>* Warm Reboot --> ~100-150 msecs<br>* Cold Reboot --> ~100-150 msecs<br>* EC Reeboot --> ~300 msecs<br><br>Change-Id: I10e91b4d9b5385331100f7eabc3be2f1e47bf377<br>Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com><br>Signed-off-by: Subrata Banik <subrata.banik@intel.com><br>---<br>A src/soc/intel/common/block/emmc/Kconfig<br>A src/soc/intel/common/block/emmc/Makefile.inc<br>A src/soc/intel/common/block/emmc/emmc_ap_init.c<br>3 files changed, 231 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/25188/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/common/block/emmc/Kconfig b/src/soc/intel/common/block/emmc/Kconfig</span><br><span>new file mode 100644</span><br><span>index 0000000..26279f5</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/intel/common/block/emmc/Kconfig</span><br><span>@@ -0,0 +1,21 @@</span><br><span style="color: hsl(120, 100%, 40%);">+config SOC_INTEL_COMMON_BLOCK_EMMC_INIT_OVER_AP</span><br><span style="color: hsl(120, 100%, 40%);">+ bool "Enable eMMC device initialization in parallel thread"</span><br><span style="color: hsl(120, 100%, 40%);">+ default n</span><br><span style="color: hsl(120, 100%, 40%);">+ select COMMONLIB_STORAGE</span><br><span style="color: hsl(120, 100%, 40%);">+ select COMMONLIB_STORAGE_MMC</span><br><span style="color: hsl(120, 100%, 40%);">+ select SDHCI_CONTROLLER</span><br><span style="color: hsl(120, 100%, 40%);">+ help</span><br><span style="color: hsl(120, 100%, 40%);">+ This option selects use Intel Common multi-threaded EMMC Controller</span><br><span style="color: hsl(120, 100%, 40%);">+ Initializtion code.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config SOC_INTEL_COMMON_BLOCK_EMMC_INIT_DEBUG</span><br><span style="color: hsl(120, 100%, 40%);">+ bool "Enable debug log for SD/MMC/eMMC card or device"</span><br><span style="color: hsl(120, 100%, 40%);">+ default n</span><br><span style="color: hsl(120, 100%, 40%);">+ depends on SOC_INTEL_COMMON_BLOCK_EMMC_INIT_OVER_AP</span><br><span style="color: hsl(120, 100%, 40%);">+ select SD_MMC_DEBUG</span><br><span style="color: hsl(120, 100%, 40%);">+ select SD_MMC_TRACE</span><br><span style="color: hsl(120, 100%, 40%);">+ select SDHC_DEBUG</span><br><span style="color: hsl(120, 100%, 40%);">+ select SDHC_TRACE</span><br><span style="color: hsl(120, 100%, 40%);">+ help</span><br><span style="color: hsl(120, 100%, 40%);">+ Enable debug log EMMC init over multi-threading. User</span><br><span style="color: hsl(120, 100%, 40%);">+ must also enable SOC_INTEL_COMMON_BLOCK_EMMC_INIT_OVER_AP.</span><br><span>diff --git a/src/soc/intel/common/block/emmc/Makefile.inc b/src/soc/intel/common/block/emmc/Makefile.inc</span><br><span>new file mode 100644</span><br><span>index 0000000..a5a77f2</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/intel/common/block/emmc/Makefile.inc</span><br><span>@@ -0,0 +1 @@</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_EMMC_INIT_OVER_AP) += emmc_ap_init.c</span><br><span>diff --git a/src/soc/intel/common/block/emmc/emmc_ap_init.c b/src/soc/intel/common/block/emmc/emmc_ap_init.c</span><br><span>new file mode 100644</span><br><span>index 0000000..4bc70db</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/intel/common/block/emmc/emmc_ap_init.c</span><br><span>@@ -0,0 +1,209 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Intel Corporation.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/io.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <bootstate.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cbmem.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <commonlib/cbmem_id.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <commonlib/sdhci.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <commonlib/storage.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/cpu.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/x86/mp.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/device.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pci.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pci_ids.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/pci_devs.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/iomap.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * To use this Common block, SOC should publish the below two MACROS -</span><br><span style="color: hsl(120, 100%, 40%);">+ * EMMC_BASE_ADDRESS - Temporary Base Address for EMMC</span><br><span style="color: hsl(120, 100%, 40%);">+ * EMMC_BASE_SIZE - Size</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static uint8_t cbmem_copy_done = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void save_media_info_to_cbmem(struct storage_media *media)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t *cbmem_loc;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ cbmem_loc = cbmem_add(CBMEM_ID_STORAGE_DATA, sizeof(*media));</span><br><span style="color: hsl(120, 100%, 40%);">+ if (cbmem_loc == NULL)</span><br><span style="color: hsl(120, 100%, 40%);">+ die("Error: Could not add cbmem area\n");</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ memcpy(cbmem_loc, media, sizeof(*media));</span><br><span style="color: hsl(120, 100%, 40%);">+ cbmem_copy_done = 1;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static uint32_t set_temp_bar(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t bar;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Program Temporary BAR for eMMC Device */</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config32(dev, PCI_BASE_ADDRESS_0, EMMC_BASE_ADDRESS);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Set the temporary base address */</span><br><span style="color: hsl(120, 100%, 40%);">+ bar = pci_read_config32(dev, PCI_BASE_ADDRESS_0);</span><br><span style="color: hsl(120, 100%, 40%);">+ bar &= ~PCI_BASE_ADDRESS_MEM_ATTR_MASK;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Enable the SD/MMC controller */</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER</span><br><span style="color: hsl(120, 100%, 40%);">+ | PCI_COMMAND_MEMORY);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Return the controller address */</span><br><span style="color: hsl(120, 100%, 40%);">+ return bar;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void platform_emmc_init(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ device_t dev = PCH_DEV_EMMC;</span><br><span style="color: hsl(120, 100%, 40%);">+ uintptr_t bar;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct sdhci_ctrlr ctrlr;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct sdhci_ctrlr *sdhci_ctrlr = &ctrlr;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct storage_media media_device;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct storage_media *media = &media_device;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Set a temporary BAR for EMMC Device to start the initialization</span><br><span style="color: hsl(120, 100%, 40%);">+ * since PCI Enumuration is not yet done. Thus resouce allocation</span><br><span style="color: hsl(120, 100%, 40%);">+ * hasn't been done yet.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ bar = set_temp_bar(dev);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Initialize the controller */</span><br><span style="color: hsl(120, 100%, 40%);">+ if (sdhci_controller_init(sdhci_ctrlr, (void *)bar)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_ERR, "Initializing the controller failure \n");</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Send all zeros to cbmem in case of failure */</span><br><span style="color: hsl(120, 100%, 40%);">+ memset((void *) media, 0, sizeof(*media));</span><br><span style="color: hsl(120, 100%, 40%);">+ save_media_info_to_cbmem(media);</span><br><span style="color: hsl(120, 100%, 40%);">+ return;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Initialize the media */</span><br><span style="color: hsl(120, 100%, 40%);">+ if (storage_setup_media(media, &sdhci_ctrlr->sd_mmc_ctrlr)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_ERR, "Initializing the device failure \n");</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Send all zeros to cbmem in case of failure */</span><br><span style="color: hsl(120, 100%, 40%);">+ memset((void *) media, 0, sizeof(*media));</span><br><span style="color: hsl(120, 100%, 40%);">+ save_media_info_to_cbmem(media);</span><br><span style="color: hsl(120, 100%, 40%);">+ return;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ save_media_info_to_cbmem(media);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void run_on_single_aps(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ if (cpu_index() != 1)</span><br><span style="color: hsl(120, 100%, 40%);">+ return;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ platform_emmc_init();</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void init_emmc(void *unused)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Only do emmc init in normal boot scenario, not during</span><br><span style="color: hsl(120, 100%, 40%);">+ * S3 Resume path.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ if(acpi_is_wakeup_s3())</span><br><span style="color: hsl(120, 100%, 40%);">+ return;</span><br><span style="color: hsl(120, 100%, 40%);">+ if (mp_run_on_aps(run_on_single_aps, 1000) < 0)</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_ERR, "Fail to run SDHCI init \n");</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This is to make sure that even if EMMC init fails somehow in Coreboot</span><br><span style="color: hsl(120, 100%, 40%);">+ * and in that case, there wont be any Memory resource allocated for it.</span><br><span style="color: hsl(120, 100%, 40%);">+ * So, in such case, before passing control to Payload, Assign the BAR</span><br><span style="color: hsl(120, 100%, 40%);">+ * address for EMMC dvice, and thus init can be handled in depthcharge</span><br><span style="color: hsl(120, 100%, 40%);">+ * without any problem.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+static void check_emmc_init(void *unused)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct storage_media *media;</span><br><span style="color: hsl(120, 100%, 40%);">+ device_t dev = PCH_DEV_EMMC;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 reg32;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * To make sure that the whole media info gets copied to cbmem location</span><br><span style="color: hsl(120, 100%, 40%);">+ * with cbmem_id "CBMEM_ID_STORAGE_DATA".</span><br><span style="color: hsl(120, 100%, 40%);">+ * If this is not done, then there might be a case where AP creates cbmem</span><br><span style="color: hsl(120, 100%, 40%);">+ * location with this ID, and before copying the data, BSP reaches to this</span><br><span style="color: hsl(120, 100%, 40%);">+ * point of the code and get improper data inside this cbmem location.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ while (1)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (cbmem_copy_done == 1)</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ media = cbmem_find(CBMEM_ID_STORAGE_DATA);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (media->ctrlr->initialized)</span><br><span style="color: hsl(120, 100%, 40%);">+ return;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Program Temporary BAR for eMMC Device */</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config32(dev, PCI_BASE_ADDRESS_0, EMMC_BASE_ADDRESS);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Ensure Memory and Bus Master bits are set */</span><br><span style="color: hsl(120, 100%, 40%);">+ reg32 = pci_read_config32(dev, PCI_COMMAND);</span><br><span style="color: hsl(120, 100%, 40%);">+ reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config32(dev, PCI_COMMAND, reg32);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct resource *res;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ res = new_resource(dev, PCI_BASE_ADDRESS_0);</span><br><span style="color: hsl(120, 100%, 40%);">+ res->base = EMMC_BASE_ADDRESS;</span><br><span style="color: hsl(120, 100%, 40%);">+ res->size = EMMC_BASE_SIZE;</span><br><span style="color: hsl(120, 100%, 40%);">+ res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void set_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct resource *res;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ res = find_resource(dev, PCI_BASE_ADDRESS_0);</span><br><span style="color: hsl(120, 100%, 40%);">+ dev->command |= PCI_COMMAND_MEMORY;</span><br><span style="color: hsl(120, 100%, 40%);">+ res->flags |= IORESOURCE_STORED;</span><br><span style="color: hsl(120, 100%, 40%);">+ report_resource_stored(dev, res, "EMMC BAR 0");</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static struct device_operations dev_ops = {</span><br><span style="color: hsl(120, 100%, 40%);">+ .read_resources = read_resources,</span><br><span style="color: hsl(120, 100%, 40%);">+ .set_resources = set_resources,</span><br><span style="color: hsl(120, 100%, 40%);">+ .enable_resources = DEVICE_NOOP,</span><br><span style="color: hsl(120, 100%, 40%);">+ .init = DEVICE_NOOP,</span><br><span style="color: hsl(120, 100%, 40%);">+ .scan_bus = NULL,</span><br><span style="color: hsl(120, 100%, 40%);">+ .enable = DEVICE_NOOP,</span><br><span style="color: hsl(120, 100%, 40%);">+ .ops_pci = &pci_dev_ops_pci,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static const unsigned short pci_device_ids[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ PCI_DEVICE_ID_INTEL_SKL_EMMC,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static const struct pci_driver pch_emmc __pci_driver = {</span><br><span style="color: hsl(120, 100%, 40%);">+ .ops = &dev_ops,</span><br><span style="color: hsl(120, 100%, 40%);">+ .vendor = PCI_VENDOR_ID_INTEL,</span><br><span style="color: hsl(120, 100%, 40%);">+ .devices = pci_device_ids</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_ENTRY, init_emmc, NULL);</span><br><span style="color: hsl(120, 100%, 40%);">+BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, check_emmc_init, NULL);</span><br><span style="color: hsl(120, 100%, 40%);">+BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, check_emmc_init, NULL);</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25188">change 25188</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25188"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I10e91b4d9b5385331100f7eabc3be2f1e47bf377 </div>
<div style="display:none"> Gerrit-Change-Number: 25188 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Barnali Sarkar <barnali.sarkar@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Subrata Banik <subrata.banik@intel.com> </div>