<p>Richard Spiegel has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25183">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">3rdparty/blobs: Commit updated blobs<br><br>AGESA.bin was merged to blobs/pi/amd/00670F00/FT4. Commit the updated blobs<br>and update AGESA.h to match AGESA.bin.<br><br>BUG=b:70338633<br>TEST=build kahlee.<br><br>Change-Id: I5a07f1c539d00aed34cfe45d6d7ef60c1dc56566<br>Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com><br>---<br>M 3rdparty/blobs<br>M src/vendorcode/amd/pi/00670F00/AGESA.h<br>2 files changed, 20 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/25183/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/3rdparty/blobs b/3rdparty/blobs</span><br><span>index 19dea8d..a4b5613 160000</span><br><span>--- a/3rdparty/blobs</span><br><span>+++ b/3rdparty/blobs</span><br><span>@@ -1 +1 @@</span><br><span style="color: hsl(0, 100%, 40%);">-Subproject commit 19dea8d171544f01f12ee6b78af0cc356ab994aa</span><br><span style="color: hsl(120, 100%, 40%);">+Subproject commit a4b561391f59e09059ce851fa19b64ca945672d5</span><br><span>diff --git a/src/vendorcode/amd/pi/00670F00/AGESA.h b/src/vendorcode/amd/pi/00670F00/AGESA.h</span><br><span>index 17f6986..2b2a8b6 100644</span><br><span>--- a/src/vendorcode/amd/pi/00670F00/AGESA.h</span><br><span>+++ b/src/vendorcode/amd/pi/00670F00/AGESA.h</span><br><span>@@ -67,6 +67,7 @@</span><br><span> #define AGESA_RUNFUNC_ON_ALL_APS                0x00028106ul</span><br><span> #define AGESA_IDLE_AN_AP                        0x00028107ul</span><br><span> #define AGESA_WAIT_FOR_ALL_APS                  0x00028108ul</span><br><span style="color: hsl(120, 100%, 40%);">+#define AGESA_HALT_THIS_AP                      0x00028109ul</span><br><span> </span><br><span> // AGESA ADVANCED CALLOUTS, Memory</span><br><span> #define AGESA_READ_SPD                 0x00028140ul</span><br><span>@@ -2514,6 +2515,18 @@</span><br><span>   IN OUT    MEM_DATA_STRUCT     *MemData;       ///< Location of the MemData structure, for reference</span><br><span> } AGESA_READ_SPD_PARAMS;</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/// Parameters structure for the interface call-out AGESA_HALT_THIS_AP</span><br><span style="color: hsl(120, 100%, 40%);">+typedef struct {</span><br><span style="color: hsl(120, 100%, 40%);">+  IN OUT    AMD_CONFIG_PARAMS StdHeader;   ///< Standard configuration header</span><br><span style="color: hsl(120, 100%, 40%);">+  IN        BOOLEAN           ExecWbinvd;  ///< Indicates whether to execute</span><br><span style="color: hsl(120, 100%, 40%);">+                                           ///  WBINVD</span><br><span style="color: hsl(120, 100%, 40%);">+  IN        BOOLEAN           PrimaryCore; ///< Indicates whether current core</span><br><span style="color: hsl(120, 100%, 40%);">+                                           ///  is the primary core of the</span><br><span style="color: hsl(120, 100%, 40%);">+                                           ///  compute unit</span><br><span style="color: hsl(120, 100%, 40%);">+  IN        BOOLEAN           CacheEn;     ///< Indicates whether cache should</span><br><span style="color: hsl(120, 100%, 40%);">+                                           ///  be enabled</span><br><span style="color: hsl(120, 100%, 40%);">+} AGESA_HALT_THIS_AP_PARAMS;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /// VoltageType values</span><br><span> typedef enum {</span><br><span>   VTYPE_CPU_VREF,                                    ///< Cpu side Vref</span><br><span>@@ -2625,6 +2638,12 @@</span><br><span>   );</span><br><span> </span><br><span> AGESA_STATUS</span><br><span style="color: hsl(120, 100%, 40%);">+AgesaHaltThisAp (</span><br><span style="color: hsl(120, 100%, 40%);">+  IN       UINTN                      FcnData,</span><br><span style="color: hsl(120, 100%, 40%);">+  IN       AGESA_HALT_THIS_AP_PARAMS  *HaltApParams</span><br><span style="color: hsl(120, 100%, 40%);">+);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+AGESA_STATUS</span><br><span> AgesaHookBeforeDramInit (</span><br><span>   IN        UINTN               SocketIdModuleId,</span><br><span>   IN OUT    MEM_DATA_STRUCT     *MemData</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25183">change 25183</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25183"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I5a07f1c539d00aed34cfe45d6d7ef60c1dc56566 </div>
<div style="display:none"> Gerrit-Change-Number: 25183 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Richard Spiegel <richard.spiegel@silverbackltd.com> </div>