<p>Vincent Palatin has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25110">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/google/zoombini/variants/meowth: FPMCU interrupt is level-triggered<br><br>Fix the IRQ configuration: it must be level-sensitive not edge-sensitive<br>(and match the GPIO configuration).<br><br>BUG=b:71986991<br>BRANCH=none<br>TEST=on Meowth, /proc/interrupts shows 'IO-APIC 46-fasteoi chromeos-ec'<br>then run 'ectool --name=cros_fp fpmode fingerup' and see the number of<br>interrupts incrementing and the MKBP event happening.<br><br>Signed-off-by: Vincent Palatin <vpalatin@chromium.org><br><br>Change-Id: Iba8cff21d637fe6bf4ef5152fc01aaf98906477d<br>---<br>M src/mainboard/google/zoombini/variants/meowth/devicetree.cb<br>1 file changed, 1 insertion(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/25110/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb</span><br><span>index 2d15c97..7db51be 100644</span><br><span>--- a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb</span><br><span>+++ b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb</span><br><span>@@ -174,7 +174,7 @@</span><br><span>                             register "hid" = "ACPI_DT_NAMESPACE_HID"</span><br><span>                                 register "uid" = "1"</span><br><span>                             register "compat_string" = ""google,cros-ec-spi""</span><br><span style="color: hsl(0, 100%, 40%);">-                         register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A22_IRQ)"</span><br><span style="color: hsl(120, 100%, 40%);">+                         register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A22_IRQ)"</span><br><span>                               device spi 0 on end</span><br><span>                  end</span><br><span>          end # GSPI #1</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25110">change 25110</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25110"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Iba8cff21d637fe6bf4ef5152fc01aaf98906477d </div>
<div style="display:none"> Gerrit-Change-Number: 25110 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Vincent Palatin <vpalatin@chromium.org> </div>