<p>Philipp Deppenwiese has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25085">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/fsp_baytrail: Add VBNV CMOS support<br><br>* Add VBNV CMOS fsp_baytrail SoC support.<br>* Add VBOOT_VBNV_CMOS to opencellular rotundu.<br><br>Change-Id: I2c1075f8e579c546edb4ff0581764a6a6aa7e89a<br>Signed-off-by: zaolin <zaolin@das-labor.org><br>---<br>M src/mainboard/opencellular/rotundu/Kconfig<br>M src/soc/intel/fsp_baytrail/Makefile.inc<br>M src/soc/intel/fsp_baytrail/include/soc/pmc.h<br>M src/soc/intel/fsp_baytrail/pmutil.c<br>4 files changed, 34 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/25085/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/opencellular/rotundu/Kconfig b/src/mainboard/opencellular/rotundu/Kconfig</span><br><span>index 79b67fb..65c43d0 100644</span><br><span>--- a/src/mainboard/opencellular/rotundu/Kconfig</span><br><span>+++ b/src/mainboard/opencellular/rotundu/Kconfig</span><br><span>@@ -34,6 +34,7 @@</span><br><span> </span><br><span> config VBOOT</span><br><span>      select MRC_CACHE_FMAP</span><br><span style="color: hsl(120, 100%, 40%);">+ select VBOOT_VBNV_CMOS</span><br><span>       select GBB_FLAG_DISABLE_LID_SHUTDOWN</span><br><span>         select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC</span><br><span>     select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC</span><br><span>diff --git a/src/soc/intel/fsp_baytrail/Makefile.inc b/src/soc/intel/fsp_baytrail/Makefile.inc</span><br><span>index e01a944..0cf99de 100644</span><br><span>--- a/src/soc/intel/fsp_baytrail/Makefile.inc</span><br><span>+++ b/src/soc/intel/fsp_baytrail/Makefile.inc</span><br><span>@@ -42,6 +42,7 @@</span><br><span> ramstage-y += ramstage.c</span><br><span> ramstage-y += gpio.c</span><br><span> romstage-y += gpio.c</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-y += pmutil.c</span><br><span> ramstage-y += pmutil.c</span><br><span> ramstage-y += southcluster.c</span><br><span> romstage-y += reset.c</span><br><span>diff --git a/src/soc/intel/fsp_baytrail/include/soc/pmc.h b/src/soc/intel/fsp_baytrail/include/soc/pmc.h</span><br><span>index 9bafdc2..16705cf 100644</span><br><span>--- a/src/soc/intel/fsp_baytrail/include/soc/pmc.h</span><br><span>+++ b/src/soc/intel/fsp_baytrail/include/soc/pmc.h</span><br><span>@@ -290,6 +290,9 @@</span><br><span> static inline void southcluster_log_state(void) {}</span><br><span> #endif</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/* Return non-zero when RTC failure happened. */</span><br><span style="color: hsl(120, 100%, 40%);">+int rtc_failure(void);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #endif /* !defined(__ASSEMBLER__) && !defined(__ACPI__) */</span><br><span> </span><br><span> #endif /* _BAYTRAIL_PMC_H_ */</span><br><span>diff --git a/src/soc/intel/fsp_baytrail/pmutil.c b/src/soc/intel/fsp_baytrail/pmutil.c</span><br><span>index a588412..ee99917 100644</span><br><span>--- a/src/soc/intel/fsp_baytrail/pmutil.c</span><br><span>+++ b/src/soc/intel/fsp_baytrail/pmutil.c</span><br><span>@@ -15,18 +15,20 @@</span><br><span> </span><br><span> #include <stdint.h></span><br><span> #include <arch/io.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cbmem.h></span><br><span> #include <console/console.h></span><br><span> </span><br><span> #include <soc/iomap.h></span><br><span> #include <soc/lpc.h></span><br><span> #include <soc/pci_devs.h></span><br><span> #include <soc/pmc.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <security/vboot/vbnv.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#if defined(__SMM__)</span><br><span style="color: hsl(120, 100%, 40%);">+#if defined(__SIMPLE_DEVICE__)</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static const pci_devfn_t pcu_dev = PCI_DEV(0, PCU_DEV, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+static const device_t pcu_dev = PCI_DEV(0, PCU_DEV, 0);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static inline pci_devfn_t get_pcu_dev(void)</span><br><span style="color: hsl(120, 100%, 40%);">+static inline device_t get_pcu_dev(void)</span><br><span> {</span><br><span>     return pcu_dev;</span><br><span> }</span><br><span>@@ -358,3 +360,27 @@</span><br><span>  write32((u32 *)(PMC_BASE_ADDRESS + GEN_PMCON1), gen_pmcon1 & ~RPS);</span><br><span>      write32((u32 *)(PMC_BASE_ADDRESS + PRSTS), prsts);</span><br><span> }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+int rtc_failure(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+   uint32_t gen_pmcon1;</span><br><span style="color: hsl(120, 100%, 40%);">+  int rtc_fail;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+  if (ps != NULL)</span><br><span style="color: hsl(120, 100%, 40%);">+               gen_pmcon1 = ps->gen_pmcon1;</span><br><span style="color: hsl(120, 100%, 40%);">+       else</span><br><span style="color: hsl(120, 100%, 40%);">+          gen_pmcon1 = read32((u32 *)(PMC_BASE_ADDRESS + GEN_PMCON1));</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+        rtc_fail = !!(gen_pmcon1 & RPS);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+        if (rtc_fail)</span><br><span style="color: hsl(120, 100%, 40%);">+         printk(BIOS_DEBUG, "RTC failure.\n");</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+     return rtc_fail;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+int vbnv_cmos_failed(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+  return rtc_failure();</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25085">change 25085</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25085"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I2c1075f8e579c546edb4ff0581764a6a6aa7e89a </div>
<div style="display:none"> Gerrit-Change-Number: 25085 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki@gmail.com> </div>