<p>Daniel Kurtz would like Daniel Kurtz to <strong>review</strong> this change.</p><p><a href="https://review.coreboot.org/25021">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/google/kahlee: Do not define SIO_EC_ENABLE_COM1<br><br>This #define tells superio.asl to add a "PNP0501" "Plug and Play<br>16550A-compatible COM port" entry to kahlee's ACPI tables.<br><br>The EC on kahlee boards do not provide a "Serial Port 1" that should<br>be exposed via ACPI to the OS.  In fact, this entry confuses the<br>kernel and in some cases can cause it to try to redirect output to a<br>non existing port.<br><br>BUG=b:74200887<br>TEST=Deploy to grunt.  Boot kernel with SERIAL_PORT_DFNS undefined and<br> "earlycon=uart,mmio32,0xfedc6000,115200,48000000" on the kernel<br> command line, and with an image with serial console enabled.<br> => System boots with (kernel) serial console enabled, starting from<br>    0.00 (earlycon), with no gaps in its output, and serial console<br>    also allows logging in.<br><br>Change-Id: I0eaed9b4461bb6a6c1aa4ce97752f588d4322b35<br>Signed-off-by: Daniel Kurtz <djkurtz@chromium.org><br>---<br>M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/ec.h<br>1 file changed, 0 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/25021/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/ec.h b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/ec.h</span><br><span>index 16b2669..e93c2dd 100644</span><br><span>--- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/ec.h</span><br><span>+++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/ec.h</span><br><span>@@ -67,6 +67,5 @@</span><br><span> #define SIO_EC_MEMMAP_ENABLE    /* EC Memory Map Resources */</span><br><span> #define SIO_EC_HOST_ENABLE     /* EC Host Interface Resources */</span><br><span> #define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */</span><br><span style="color: hsl(0, 100%, 40%);">-#define SIO_EC_ENABLE_COM1    /* Enable Serial Port 1 */</span><br><span> </span><br><span> #endif</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25021">change 25021</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25021"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I0eaed9b4461bb6a6c1aa4ce97752f588d4322b35 </div>
<div style="display:none"> Gerrit-Change-Number: 25021 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Daniel Kurtz <djkurtz@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Daniel Kurtz <djkurtz@chromium.org> </div>