<p>Nick Vaccaro has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25013">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/common/block/gspi: set cs polarity before using<br><br>Move call to __gspi_cs_change() in gspi_ctrlr_setup() to after<br>initialization of cs polarity since it requires polarity to be<br>set to work properly.  Failure to do so confuses cr50.<br><br>BUG=b:70628116<br>BRANCH=chromeos-2016.05<br>TEST='emerge-meowth coreboot' and verify on scope that chip select<br>polarity is correct for the first transaction.<br><br>Change-Id: I20b4f584663477d751a07889bccc865efbf9c469<br>Signed-off-by: Nick Vaccaro <nvaccaro@google.com><br>---<br>M src/soc/intel/common/block/gspi/gspi.c<br>1 file changed, 3 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/25013/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/common/block/gspi/gspi.c b/src/soc/intel/common/block/gspi/gspi.c</span><br><span>index 2f574a4..60c7391 100644</span><br><span>--- a/src/soc/intel/common/block/gspi/gspi.c</span><br><span>+++ b/src/soc/intel/common/block/gspi/gspi.c</span><br><span>@@ -414,9 +414,6 @@</span><br><span>  /* Take controller out of reset, keeping DMA in reset. */</span><br><span>    gspi_write_mmio_reg(p, RESETS, CTRLR_ACTIVE | DMA_RESET);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-   /* De-assert chip select. */</span><br><span style="color: hsl(0, 100%, 40%);">-    __gspi_cs_change(p, CS_DEASSERT);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span>    /*</span><br><span>    * CS control:</span><br><span>        * - Set SW mode.</span><br><span>@@ -430,6 +427,9 @@</span><br><span>      cs_ctrl |= gspi_csctrl_state(pol, CS_DEASSERT);</span><br><span>      gspi_write_mmio_reg(p, SPI_CS_CONTROL, cs_ctrl);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+  /* De-assert chip select. */</span><br><span style="color: hsl(120, 100%, 40%);">+  __gspi_cs_change(p, CS_DEASSERT);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>  /* Disable SPI controller. */</span><br><span>        gspi_write_mmio_reg(p, SSCR0, SSCR0_SSE_DISABLE);</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25013">change 25013</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25013"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I20b4f584663477d751a07889bccc865efbf9c469 </div>
<div style="display:none"> Gerrit-Change-Number: 25013 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Nick Vaccaro <nvaccaro@google.com> </div>