<p>Shelley Chen has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/25000">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">Alkali: Add memory detection logic<br><br>Alkali will use LPDDR3, so need to have Nami support both<br>DDR4 and LPDDR3.  We do this with the PCH_MEM_CONFIG4 GPIO.<br><br>BUG=b:73514687<br>BRANCH=None<br>TEST=None<br><br>Change-Id: Ife6740ce0e8fe109ded7b954134171ba91895628<br>Signed-off-by: Shelley Chen <shchen@chromium.org><br>---<br>M src/mainboard/google/poppy/variants/nami/include/variant/gpio.h<br>M src/mainboard/google/poppy/variants/nami/memory.c<br>2 files changed, 12 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/25000/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/poppy/variants/nami/include/variant/gpio.h b/src/mainboard/google/poppy/variants/nami/include/variant/gpio.h</span><br><span>index 3dfe92f..98450f6 100644</span><br><span>--- a/src/mainboard/google/poppy/variants/nami/include/variant/gpio.h</span><br><span>+++ b/src/mainboard/google/poppy/variants/nami/include/variant/gpio.h</span><br><span>@@ -30,6 +30,7 @@</span><br><span> #define GPIO_MEM_CONFIG_1  GPP_C13</span><br><span> #define GPIO_MEM_CONFIG_2    GPP_C14</span><br><span> #define GPIO_MEM_CONFIG_3    GPP_C15</span><br><span style="color: hsl(120, 100%, 40%);">+#define GPIO_MEM_CONFIG_4      GPP_E15</span><br><span> </span><br><span> /* EC wake is LAN_WAKE# which is a special DeepSX wake pin */</span><br><span> #define GPE_EC_WAKE             GPE0_LAN_WAK</span><br><span>diff --git a/src/mainboard/google/poppy/variants/nami/memory.c b/src/mainboard/google/poppy/variants/nami/memory.c</span><br><span>index dec7626..e6c169c 100644</span><br><span>--- a/src/mainboard/google/poppy/variants/nami/memory.c</span><br><span>+++ b/src/mainboard/google/poppy/variants/nami/memory.c</span><br><span>@@ -14,6 +14,8 @@</span><br><span>  */</span><br><span> </span><br><span> #include <baseboard/variants.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <gpio.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <variant/gpio.h></span><br><span> #include <string.h></span><br><span> </span><br><span> /* Rcomp resistor */</span><br><span>@@ -31,8 +33,17 @@</span><br><span> </span><br><span> void variant_memory_params(struct memory_params *p)</span><br><span> {</span><br><span style="color: hsl(120, 100%, 40%);">+ int pch_mem_config4 = gpio_get(GPIO_MEM_CONFIG_4);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+  /* default to DDR4 */</span><br><span>        memset(p, 0, sizeof(*p));</span><br><span>    p->type = MEMORY_DDR4;</span><br><span style="color: hsl(120, 100%, 40%);">+     p->use_sec_spd = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+        if (pch_mem_config4 == 1) {</span><br><span style="color: hsl(120, 100%, 40%);">+           /* set to LPDDR3 */</span><br><span style="color: hsl(120, 100%, 40%);">+           p->type = MEMORY_LPDDR3;</span><br><span style="color: hsl(120, 100%, 40%);">+           p->use_sec_spd = 1;</span><br><span style="color: hsl(120, 100%, 40%);">+        }</span><br><span> </span><br><span>        /* Rcomp resistor values are different for SDP and DDP. */</span><br><span>   if (ddp_bitmap & MEM_ID(variant_memory_sku())) {</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25000">change 25000</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25000"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ife6740ce0e8fe109ded7b954134171ba91895628 </div>
<div style="display:none"> Gerrit-Change-Number: 25000 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Shelley Chen <shchen@google.com> </div>