<p>Richard Spiegel has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/24999">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/amd/stoneyridge: Create a HALT_THIS_AP callout<br><br>It was required for all cores use the same CAR teardown function<br>(exit_car.S and gcccar.inc). AGESA has already been modified to do the<br>AP to do the call out. Create assembly code to call chipset_teardown_car<br>and then enter an endless loop with halt instruction. Then create the<br>call out that will call this new assembly code.<br><br>BUG=b:70338633<br>TEST=Created a debug version of AGESA that would print the returned<br>status of HALT_THIS_AP. Build code without the fix, see the return.<br>Build code with the fix, see that there's no return.<br><br>Change-Id: I05ee405812211d93dfdbdc5ee7d9978c2eb585e1<br>Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com><br>---<br>M src/soc/amd/common/block/cpu/Makefile.inc<br>A src/soc/amd/common/block/cpu/car/ap_exit_car.S<br>M src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h<br>A src/soc/amd/common/block/include/amdblocks/car.h<br>M src/soc/amd/common/block/pi/def_callouts.c<br>M src/soc/amd/stoneyridge/BiosCallOuts.c<br>M src/vendorcode/amd/pi/00670F00/AGESA.h<br>7 files changed, 108 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/24999/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/amd/common/block/cpu/Makefile.inc b/src/soc/amd/common/block/cpu/Makefile.inc</span><br><span>index ecc9afbc..fed208a 100644</span><br><span>--- a/src/soc/amd/common/block/cpu/Makefile.inc</span><br><span>+++ b/src/soc/amd/common/block/cpu/Makefile.inc</span><br><span>@@ -1,3 +1,7 @@</span><br><span> bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car/cache_as_ram.S</span><br><span style="color: hsl(120, 100%, 40%);">+bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car/ap_exit_car.S</span><br><span style="color: hsl(120, 100%, 40%);">+bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car/exit_car.S</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> postcar-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car/exit_car.S</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car/exit_car.S</span><br><span>diff --git a/src/soc/amd/common/block/cpu/car/ap_exit_car.S b/src/soc/amd/common/block/cpu/car/ap_exit_car.S</span><br><span>new file mode 100644</span><br><span>index 0000000..82d3413</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/amd/common/block/cpu/car/ap_exit_car.S</span><br><span>@@ -0,0 +1,47 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Advanced Micro Devices, Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+.code32</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/x86/cr.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+.globl ap_teardown_car</span><br><span style="color: hsl(120, 100%, 40%);">+ap_teardown_car:</span><br><span style="color: hsl(120, 100%, 40%);">+ pop %edi /* return address */</span><br><span style="color: hsl(120, 100%, 40%);">+ pop %esi /* flags */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* chipset_teardown_car() is expected to disable cache-as-ram. */</span><br><span style="color: hsl(120, 100%, 40%);">+ call chipset_teardown_car</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Check flags requirements (0 = FALSE, 1 = TRUE) :</span><br><span style="color: hsl(120, 100%, 40%);">+ * bit 0 = ExecWbinvd</span><br><span style="color: hsl(120, 100%, 40%);">+ * bit 1 = CacheEn</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ test %esi, 1</span><br><span style="color: hsl(120, 100%, 40%);">+ jz 1f</span><br><span style="color: hsl(120, 100%, 40%);">+ wbinvd</span><br><span style="color: hsl(120, 100%, 40%);">+1:</span><br><span style="color: hsl(120, 100%, 40%);">+ test %esi, 2</span><br><span style="color: hsl(120, 100%, 40%);">+ jz 2f</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Enable cache */</span><br><span style="color: hsl(120, 100%, 40%);">+ mov %cr0, %eax</span><br><span style="color: hsl(120, 100%, 40%);">+ and $(~(CR0_CD | CR0_NW)), %eax</span><br><span style="color: hsl(120, 100%, 40%);">+ mov %eax, %cr0</span><br><span style="color: hsl(120, 100%, 40%);">+2:</span><br><span style="color: hsl(120, 100%, 40%);">+ cli</span><br><span style="color: hsl(120, 100%, 40%);">+ hlt</span><br><span style="color: hsl(120, 100%, 40%);">+ jmp 2b</span><br><span>diff --git a/src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h b/src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h</span><br><span>index e061c63..34131cf 100644</span><br><span>--- a/src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h</span><br><span>+++ b/src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h</span><br><span>@@ -57,6 +57,7 @@</span><br><span> </span><br><span> AGESA_STATUS agesa_fch_initreset(UINT32 Func, UINTN FchData, VOID *ConfigPtr);</span><br><span> AGESA_STATUS agesa_fch_initenv(UINT32 Func, UINTN FchData, VOID *ConfigPtr);</span><br><span style="color: hsl(120, 100%, 40%);">+AGESA_STATUS agesa_HaltThisAp(UINT32 Func, UINTN Data, VOID *ConfigPtr);</span><br><span> </span><br><span> void platform_FchParams_reset(FCH_RESET_DATA_BLOCK *FchParams_reset);</span><br><span> void platform_FchParams_env(FCH_DATA_BLOCK *FchParams_env);</span><br><span>diff --git a/src/soc/amd/common/block/include/amdblocks/car.h b/src/soc/amd/common/block/include/amdblocks/car.h</span><br><span>new file mode 100644</span><br><span>index 0000000..60e7c6e</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/amd/common/block/include/amdblocks/car.h</span><br><span>@@ -0,0 +1,21 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2018 Advanced Micro Devices, Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef __AMD_CAR_H__</span><br><span style="color: hsl(120, 100%, 40%);">+#define __AMD_CAR_H__</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void ap_teardown_car(uint32_t flags);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#endif /* __AMD_CAR_H__ */</span><br><span>diff --git a/src/soc/amd/common/block/pi/def_callouts.c b/src/soc/amd/common/block/pi/def_callouts.c</span><br><span>index c05d4de..31992e1 100644</span><br><span>--- a/src/soc/amd/common/block/pi/def_callouts.c</span><br><span>+++ b/src/soc/amd/common/block/pi/def_callouts.c</span><br><span>@@ -29,6 +29,7 @@</span><br><span> const BIOS_CALLOUT_STRUCT BiosCallouts[] = {</span><br><span> { AGESA_DO_RESET, agesa_Reset },</span><br><span> { AGESA_FCH_OEM_CALLOUT, agesa_fch_initreset },</span><br><span style="color: hsl(120, 100%, 40%);">+ { AGESA_HALT_THIS_AP, agesa_HaltThisAp },</span><br><span> { AGESA_GNB_PCIE_SLOT_RESET, agesa_PcieSlotResetControl }</span><br><span> };</span><br><span> #else</span><br><span>diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c</span><br><span>index 4ddcedc..f30ed3c 100644</span><br><span>--- a/src/soc/amd/stoneyridge/BiosCallOuts.c</span><br><span>+++ b/src/soc/amd/stoneyridge/BiosCallOuts.c</span><br><span>@@ -26,6 +26,7 @@</span><br><span> #include <amdlib.h></span><br><span> #include <amdblocks/dimm_spd.h></span><br><span> #include "chip.h"</span><br><span style="color: hsl(120, 100%, 40%);">+#include <amdblocks/car.h></span><br><span> </span><br><span> void __attribute__((weak)) platform_FchParams_reset(</span><br><span> FCH_RESET_DATA_BLOCK *FchParams_reset) {}</span><br><span>@@ -139,6 +140,24 @@</span><br><span> return AGESA_SUCCESS;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+AGESA_STATUS agesa_HaltThisAp(UINT32 Func, UINTN Data, VOID *ConfigPtr)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ AGESA_HALT_THIS_AP_PARAMS *info = ConfigPtr;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t flags = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (info->PrimaryCore == TRUE)</span><br><span style="color: hsl(120, 100%, 40%);">+ return AGESA_UNSUPPORTED; /* force normal path */</span><br><span style="color: hsl(120, 100%, 40%);">+ if (info->ExecWbinvd == TRUE)</span><br><span style="color: hsl(120, 100%, 40%);">+ flags |= 1;</span><br><span style="color: hsl(120, 100%, 40%);">+ if (info->CacheEn == TRUE)</span><br><span style="color: hsl(120, 100%, 40%);">+ flags |= 2;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ ap_teardown_car(flags); /* does not return */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Should never reach here */</span><br><span style="color: hsl(120, 100%, 40%);">+ return AGESA_UNSUPPORTED;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /* Allow mainboards to fill the SPD buffer */</span><br><span> __attribute__((weak)) int mainboard_read_spd(uint8_t spdAddress, char *buf,</span><br><span> size_t len)</span><br><span>diff --git a/src/vendorcode/amd/pi/00670F00/AGESA.h b/src/vendorcode/amd/pi/00670F00/AGESA.h</span><br><span>index 17f6986..dc248dd 100644</span><br><span>--- a/src/vendorcode/amd/pi/00670F00/AGESA.h</span><br><span>+++ b/src/vendorcode/amd/pi/00670F00/AGESA.h</span><br><span>@@ -67,6 +67,7 @@</span><br><span> #define AGESA_RUNFUNC_ON_ALL_APS 0x00028106ul</span><br><span> #define AGESA_IDLE_AN_AP 0x00028107ul</span><br><span> #define AGESA_WAIT_FOR_ALL_APS 0x00028108ul</span><br><span style="color: hsl(120, 100%, 40%);">+#define AGESA_HALT_THIS_AP 0x00028109ul</span><br><span> </span><br><span> // AGESA ADVANCED CALLOUTS, Memory</span><br><span> #define AGESA_READ_SPD 0x00028140ul</span><br><span>@@ -2514,6 +2515,14 @@</span><br><span> IN OUT MEM_DATA_STRUCT *MemData; ///< Location of the MemData structure, for reference</span><br><span> } AGESA_READ_SPD_PARAMS;</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/// Parameters structure for the interface call-out AGESA_HALT_THIS_AP</span><br><span style="color: hsl(120, 100%, 40%);">+typedef struct {</span><br><span style="color: hsl(120, 100%, 40%);">+ IN OUT AMD_CONFIG_PARAMS StdHeader;</span><br><span style="color: hsl(120, 100%, 40%);">+ IN BOOLEAN ExecWbinvd;</span><br><span style="color: hsl(120, 100%, 40%);">+ IN BOOLEAN PrimaryCore;</span><br><span style="color: hsl(120, 100%, 40%);">+ IN BOOLEAN CacheEn;</span><br><span style="color: hsl(120, 100%, 40%);">+} AGESA_HALT_THIS_AP_PARAMS;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /// VoltageType values</span><br><span> typedef enum {</span><br><span> VTYPE_CPU_VREF, ///< Cpu side Vref</span><br><span>@@ -2625,6 +2634,12 @@</span><br><span> );</span><br><span> </span><br><span> AGESA_STATUS</span><br><span style="color: hsl(120, 100%, 40%);">+AgesaHaltThisAp(</span><br><span style="color: hsl(120, 100%, 40%);">+ IN UINTN FcnData,</span><br><span style="color: hsl(120, 100%, 40%);">+ IN AGESA_HALT_THIS_AP_PARAMS *HaltApParams</span><br><span style="color: hsl(120, 100%, 40%);">+);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+AGESA_STATUS</span><br><span> AgesaHookBeforeDramInit (</span><br><span> IN UINTN SocketIdModuleId,</span><br><span> IN OUT MEM_DATA_STRUCT *MemData</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/24999">change 24999</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I05ee405812211d93dfdbdc5ee7d9978c2eb585e1 </div>
<div style="display:none"> Gerrit-Change-Number: 24999 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Richard Spiegel <richard.spiegel@silverbackltd.com> </div>