<p>Justin TerAvest has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/24916">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/google/kahlee: Initialize WLAN GPIOs early.<br><br>The GPIOs for PCIe reset and power enable for WLAN must be set up before<br>amdinitearly for wlan to function.<br><br>BUG=b:73898539<br>TEST=Boot, see WLAN controller in lspci<br><br>Change-Id: I568a3240a54817ab6dcf15fe39f7f1336943852b<br>Signed-off-by: Justin TerAvest <teravest@chromium.org><br>---<br>M src/mainboard/google/kahlee/bootblock/bootblock.c<br>M src/mainboard/google/kahlee/variants/baseboard/gpio.c<br>M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h<br>M src/mainboard/google/kahlee/variants/kahlee/gpio.c<br>4 files changed, 34 insertions(+), 6 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/24916/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/kahlee/bootblock/bootblock.c b/src/mainboard/google/kahlee/bootblock/bootblock.c</span><br><span>index 4a65d8f..e125c2c 100644</span><br><span>--- a/src/mainboard/google/kahlee/bootblock/bootblock.c</span><br><span>+++ b/src/mainboard/google/kahlee/bootblock/bootblock.c</span><br><span>@@ -20,6 +20,15 @@</span><br><span> #include <variant/ec.h></span><br><span> #include <variant/gpio.h></span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void bootblock_mainboard_early_init(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ size_t num_gpios;</span><br><span style="color: hsl(120, 100%, 40%);">+ const struct soc_amd_stoneyridge_gpio *gpios;</span><br><span style="color: hsl(120, 100%, 40%);">+ gpios = variant_pre_init_gpio_table(&num_gpios);</span><br><span style="color: hsl(120, 100%, 40%);">+ sb_program_gpios(gpios, num_gpios);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> void bootblock_mainboard_init(void)</span><br><span> {</span><br><span> size_t num_gpios;</span><br><span>diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c</span><br><span>index de70be4..e23c9cf 100644</span><br><span>--- a/src/mainboard/google/kahlee/variants/baseboard/gpio.c</span><br><span>+++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c</span><br><span>@@ -20,6 +20,17 @@</span><br><span> #include <stdlib.h></span><br><span> </span><br><span> /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Pins that must be set up before amdinitearly go here.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+const static struct soc_amd_stoneyridge_gpio gpio_set_stage_pre_init[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* GPIO_4 - EN_PP3300_WLAN */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_GPO(GPIO_4, HIGH),</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* GPIO_70 - WLAN_PE_RST_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_GPO(GPIO_70, HIGH),</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span> * As a rule of thumb, GPIO pins used by coreboot should be initialized at</span><br><span> * bootblock while GPIO pins used only by the OS should be initialized at</span><br><span> * ramstage.</span><br><span>@@ -34,9 +45,6 @@</span><br><span> /* GPIO_3 - MEM_VOLT_SEL */</span><br><span> PAD_GPI(GPIO_3, PULL_UP),</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* GPIO_4 - EN_PP3300_WLAN */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_GPO(GPIO_4, HIGH),</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /* GPIO_5 - PCH_TRACKPAD_INT_3V3_ODL, SCI */</span><br><span> PAD_GPI(GPIO_5, PULL_UP),</span><br><span> </span><br><span>@@ -89,9 +97,6 @@</span><br><span> /* GPIO_42 - S5_MUX_CTRL */</span><br><span> PAD_NF(GPIO_42, S5_MUX_CTRL, PULL_NONE),</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* GPIO_70 - WLAN_PE_RST_L */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_GPO(GPIO_70, HIGH),</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> /* GPIO_74 - LPC_CLK0_EC_R */</span><br><span> PAD_NF(GPIO_74, LPCCLK0, PULL_DOWN),</span><br><span> </span><br><span>@@ -255,6 +260,13 @@</span><br><span> };</span><br><span> </span><br><span> const __attribute__((weak))</span><br><span style="color: hsl(120, 100%, 40%);">+struct soc_amd_stoneyridge_gpio *variant_pre_init_gpio_table(size_t *size)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ *size = ARRAY_SIZE(gpio_set_stage_pre_init);</span><br><span style="color: hsl(120, 100%, 40%);">+ return gpio_set_stage_pre_init;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+const __attribute__((weak))</span><br><span> struct soc_amd_stoneyridge_gpio *variant_early_gpio_table(size_t *size)</span><br><span> {</span><br><span> *size = ARRAY_SIZE(gpio_set_stage_reset);</span><br><span>diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h</span><br><span>index 83ee119..188d35c 100644</span><br><span>--- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h</span><br><span>+++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h</span><br><span>@@ -27,6 +27,7 @@</span><br><span> int variant_mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len);</span><br><span> int variant_get_xhci_oc_map(uint16_t *usb_oc_map);</span><br><span> int variant_get_ehci_oc_map(uint16_t *usb_oc_map);</span><br><span style="color: hsl(120, 100%, 40%);">+const struct soc_amd_stoneyridge_gpio *variant_pre_init_gpio_table(size_t *size);</span><br><span> const struct soc_amd_stoneyridge_gpio *variant_early_gpio_table(size_t *size);</span><br><span> const struct soc_amd_stoneyridge_gpio *variant_gpio_table(size_t *size);</span><br><span> </span><br><span>diff --git a/src/mainboard/google/kahlee/variants/kahlee/gpio.c b/src/mainboard/google/kahlee/variants/kahlee/gpio.c</span><br><span>index d1cc017..ec1888f 100644</span><br><span>--- a/src/mainboard/google/kahlee/variants/kahlee/gpio.c</span><br><span>+++ b/src/mainboard/google/kahlee/variants/kahlee/gpio.c</span><br><span>@@ -96,6 +96,12 @@</span><br><span> {GPIO_119, Function2, FCH_GPIO_PULL_UP_ENABLE | OUTPUT_H },</span><br><span> };</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+const struct soc_amd_stoneyridge_gpio *variant_pre_init_gpio_table(size_t *size)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ *size = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ return NULL;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> const struct soc_amd_stoneyridge_gpio *variant_early_gpio_table(size_t *size)</span><br><span> {</span><br><span> *size = ARRAY_SIZE(gpio_set_stage_reset);</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/24916">change 24916</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I568a3240a54817ab6dcf15fe39f7f1336943852b </div>
<div style="display:none"> Gerrit-Change-Number: 24916 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Justin TerAvest <teravest@chromium.org> </div>