<p>Julien Viard de Galbert has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/24912">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/scaleway/tagada: Set DIMM slot information from mainboard<br><br>This field is not provided by the soc code so adding it.<br><br>Change-Id: I6fdf3520da62336a5c654575ed8d1f33eb4f4dc5<br>Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net><br>---<br>M src/mainboard/scaleway/tagada/ramstage.c<br>1 file changed, 10 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/24912/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/scaleway/tagada/ramstage.c b/src/mainboard/scaleway/tagada/ramstage.c</span><br><span>index 0aa6f13..539e67f 100644</span><br><span>--- a/src/mainboard/scaleway/tagada/ramstage.c</span><br><span>+++ b/src/mainboard/scaleway/tagada/ramstage.c</span><br><span>@@ -18,9 +18,19 @@</span><br><span> #include <console/console.h></span><br><span> #include <fsp/api.h></span><br><span> #include <soc/ramstage.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <spd.h></span><br><span> </span><br><span> void mainboard_silicon_init_params(FSPS_UPD *params)</span><br><span> {</span><br><span>     /* Disable eMMC */</span><br><span>   params->FspsConfig.PcdEnableEmmc = 0;</span><br><span> }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* Add any mainboard specific information for dimm */</span><br><span style="color: hsl(120, 100%, 40%);">+void mainboard_add_dimm_info(</span><br><span style="color: hsl(120, 100%, 40%);">+ struct memory_info *mem_info,</span><br><span style="color: hsl(120, 100%, 40%);">+ int channel, int dimm, int index)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+  /* Mainboard only has DDR4 DIMM slots */</span><br><span style="color: hsl(120, 100%, 40%);">+      mem_info->dimm[index].mod_type = SPD_UDIMM;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/24912">change 24912</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/24912"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I6fdf3520da62336a5c654575ed8d1f33eb4f4dc5 </div>
<div style="display:none"> Gerrit-Change-Number: 24912 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Julien Viard de Galbert <jviarddegalbert@online.net> </div>