<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23849">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">[NOT TESTED]mainboard/asus/a8v-e_deluxe: Fix w83627ehg registers<br><br>CR 0x24, 0x2a and 0x2c are<br>global control registers.<br><br>Change-Id: If1be087e4b964cb7a782a574f2b9e007c71f8393<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/mainboard/asus/a8v-e_deluxe/romstage.c<br>1 file changed, 9 insertions(+), 8 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/23849/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c</span><br><span>index 5ade055..556884d 100644</span><br><span>--- a/src/mainboard/asus/a8v-e_deluxe/romstage.c</span><br><span>+++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c</span><br><span>@@ -46,6 +46,7 @@</span><br><span> #define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)</span><br><span> #define GPIO_DEV PNP_DEV(0x2e, W83627EHG_GPIO_SUSLED_V)</span><br><span> #define ACPI_DEV PNP_DEV(0x2e, W83627EHG_ACPI)</span><br><span style="color: hsl(120, 100%, 40%);">+#define DUMMY_DEV PNP_DEV(0x2e, 0)</span><br><span> </span><br><span> void memreset(int controllers, const struct mem_controller *ctrl) { }</span><br><span> void activate_spd_rom(const struct mem_controller *ctrl) { }</span><br><span>@@ -94,17 +95,17 @@</span><br><span> {</span><br><span>         u8 reg;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-     pnp_enter_conf_state(SERIAL_DEV);</span><br><span style="color: hsl(120, 100%, 40%);">+     pnp_enter_conf_state(DUMMY_DEV);</span><br><span>     /* We have 24MHz input. */</span><br><span style="color: hsl(0, 100%, 40%);">-      reg = pnp_read_config(SERIAL_DEV, 0x24);</span><br><span style="color: hsl(0, 100%, 40%);">-        pnp_write_config(SERIAL_DEV, 0x24, (reg & ~0x40));</span><br><span style="color: hsl(120, 100%, 40%);">+        reg = pnp_read_config(DUMMY_DEV, 0x24);</span><br><span style="color: hsl(120, 100%, 40%);">+       pnp_write_config(DUMMY_DEV, 0x24, (reg & ~0x40));</span><br><span>        /* We have GPIO for KB/MS pin. */</span><br><span style="color: hsl(0, 100%, 40%);">-       reg = pnp_read_config(SERIAL_DEV, 0x2a);</span><br><span style="color: hsl(0, 100%, 40%);">-        pnp_write_config(SERIAL_DEV, 0x2a, (reg | 1));</span><br><span style="color: hsl(120, 100%, 40%);">+        reg = pnp_read_config(DUMMY_DEV, 0x2a);</span><br><span style="color: hsl(120, 100%, 40%);">+       pnp_write_config(DUMMY_DEV, 0x2a, (reg | 1));</span><br><span>        /* We have all RESTOUT and even some reserved bits, too. */</span><br><span style="color: hsl(0, 100%, 40%);">-     reg = pnp_read_config(SERIAL_DEV, 0x2c);</span><br><span style="color: hsl(0, 100%, 40%);">-        pnp_write_config(SERIAL_DEV, 0x2c, (reg | 0xf0));</span><br><span style="color: hsl(0, 100%, 40%);">-       pnp_exit_conf_state(SERIAL_DEV);</span><br><span style="color: hsl(120, 100%, 40%);">+      reg = pnp_read_config(DUMMY_DEV, 0x2c);</span><br><span style="color: hsl(120, 100%, 40%);">+       pnp_write_config(DUMMY_DEV, 0x2c, (reg | 0xf0));</span><br><span style="color: hsl(120, 100%, 40%);">+      pnp_exit_conf_state(DUMMY_DEV);</span><br><span> </span><br><span>  pnp_enter_conf_state(ACPI_DEV);</span><br><span>      pnp_set_logical_device(ACPI_DEV);</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23849">change 23849</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23849"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: If1be087e4b964cb7a782a574f2b9e007c71f8393 </div>
<div style="display:none"> Gerrit-Change-Number: 23849 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>