<p>Philipp Deppenwiese has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23798">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/fsp_baytrail: Fix vboot and TPM support<br><br>* Add default for VBOOT_STARTS_IN_* romstage.<br>* Remove unecessary TPM ACPI code which is normally<br>  done inside the tpm driver itself.<br><br>Change-Id: Id33b7f2b9269593cd3e62f63752a660a144600da<br>Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org><br>---<br>M src/soc/intel/fsp_baytrail/Kconfig<br>M src/soc/intel/fsp_baytrail/acpi/lpc.asl<br>2 files changed, 3 insertions(+), 23 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/23798/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig</span><br><span>index 549ea55..601767b 100644</span><br><span>--- a/src/soc/intel/fsp_baytrail/Kconfig</span><br><span>+++ b/src/soc/intel/fsp_baytrail/Kconfig</span><br><span>@@ -47,6 +47,9 @@</span><br><span>       # Microcode header files are delivered in FSP package</span><br><span>        select USES_MICROCODE_HEADER_FILES if HAVE_FSP_BIN</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+config VBOOT</span><br><span style="color: hsl(120, 100%, 40%);">+  select VBOOT_STARTS_IN_ROMSTAGE</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> config SOC_INTEL_FSP_BAYTRAIL_MD</span><br><span>        bool</span><br><span>         default n</span><br><span>diff --git a/src/soc/intel/fsp_baytrail/acpi/lpc.asl b/src/soc/intel/fsp_baytrail/acpi/lpc.asl</span><br><span>index 17d6f43..00aac51 100644</span><br><span>--- a/src/soc/intel/fsp_baytrail/acpi/lpc.asl</span><br><span>+++ b/src/soc/intel/fsp_baytrail/acpi/lpc.asl</span><br><span>@@ -135,27 +135,4 @@</span><br><span> </span><br><span>        // Include mainboard's superio.asl file.</span><br><span>         #include "acpi/superio.asl"</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#if IS_ENABLED(CONFIG_LPC_TPM)</span><br><span style="color: hsl(0, 100%, 40%);">-     Device (TPM)            // Trusted Platform Module</span><br><span style="color: hsl(0, 100%, 40%);">-      {</span><br><span style="color: hsl(0, 100%, 40%);">-               Name(_HID, EISAID("IFX0102"))</span><br><span style="color: hsl(0, 100%, 40%);">-         Name(_CID, 0x310cd041)</span><br><span style="color: hsl(0, 100%, 40%);">-          Name(_UID, 1)</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-           Method(_STA, 0)</span><br><span style="color: hsl(0, 100%, 40%);">-         {</span><br><span style="color: hsl(0, 100%, 40%);">-                       If (TPMP) {</span><br><span style="color: hsl(0, 100%, 40%);">-                             Return (0xf)</span><br><span style="color: hsl(0, 100%, 40%);">-                    }</span><br><span style="color: hsl(0, 100%, 40%);">-                       Return (0x0)</span><br><span style="color: hsl(0, 100%, 40%);">-            }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-               Name(_CRS, ResourceTemplate() {</span><br><span style="color: hsl(0, 100%, 40%);">-                 IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)</span><br><span style="color: hsl(0, 100%, 40%);">-                   IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)</span><br><span style="color: hsl(0, 100%, 40%);">-                 Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)</span><br><span style="color: hsl(0, 100%, 40%);">-           })</span><br><span style="color: hsl(0, 100%, 40%);">-      }</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span> }</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23798">change 23798</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23798"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Id33b7f2b9269593cd3e62f63752a660a144600da </div>
<div style="display:none"> Gerrit-Change-Number: 23798 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki@gmail.com> </div>