<p>Andre Heider has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23796">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/nvidia/tegra210: set up the clock of the chosen UART<br><br>Don't always set up UARTA, but instead honor<br>CONFIG_CONSOLE_SERIAL_TEGRA210_UARTx and set up the clock of the<br>chosen UART.<br><br>Now the matching clock for the used UART is set up<br>(the UART driver uses CONFIG_CONSOLE_SERIAL_TEGRA210_UART_ADDRESS, which<br>in return is already based on CONFIG_CONSOLE_SERIAL_TEGRA210_UARTx).<br><br>Change-Id: Ife209d42af83459136a019c21c2a069396ab36db<br>Signed-off-by: Andre Heider <a.heider@gmail.com><br>---<br>M src/soc/nvidia/tegra210/clock.c<br>1 file changed, 7 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/23796/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/nvidia/tegra210/clock.c b/src/soc/nvidia/tegra210/clock.c</span><br><span>index cc8af55..ba1efdc 100644</span><br><span>--- a/src/soc/nvidia/tegra210/clock.c</span><br><span>+++ b/src/soc/nvidia/tegra210/clock.c</span><br><span>@@ -21,6 +21,7 @@</span><br><span> #include <soc/clk_rst.h></span><br><span> #include <soc/clock.h></span><br><span> #include <soc/clst_clk.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/console_uart.h></span><br><span> #include <soc/flow.h></span><br><span> #include <soc/maincpu.h></span><br><span> #include <soc/pmc.h></span><br><span>@@ -489,12 +490,15 @@</span><br><span>  */</span><br><span> void clock_early_uart(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-       write32(CLK_RST_REG(clk_src_uarta),</span><br><span style="color: hsl(0, 100%, 40%);">-             CLK_SRC_DEV_ID(UARTA, PLLP) << CLK_SOURCE_SHIFT |</span><br><span style="color: hsl(120, 100%, 40%);">+       if (console_uart_get_id() == UART_ID_NONE)</span><br><span style="color: hsl(120, 100%, 40%);">+            return;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+     write32(console_uart_clk_rst_reg(),</span><br><span style="color: hsl(120, 100%, 40%);">+           console_uart_clk_src_dev_id() << CLK_SOURCE_SHIFT |</span><br><span>            CLK_UART_DIV_OVERRIDE |</span><br><span>              CLK_DIVIDER(TEGRA_PLLP_KHZ, 1843));</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- clock_enable_clear_reset_l(CLK_L_UARTA);</span><br><span style="color: hsl(120, 100%, 40%);">+      console_uart_clock_enable_clear_reset();</span><br><span> }</span><br><span> </span><br><span> /* Enable output clock (CLK1~3) for external peripherals. */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23796">change 23796</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23796"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ife209d42af83459136a019c21c2a069396ab36db </div>
<div style="display:none"> Gerrit-Change-Number: 23796 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Andre Heider <a.heider@gmail.com> </div>