<p>Patrick Rudolph has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23775">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/cavium: Merge WDT and timer<br><br>Merge WDT code into timer.<br>Clean WDT and timer.<br>Add support for multiple watchdogs.<br>Move everything to common folder.<br><br>Tested the watchdog, works fine.<br><br>Change-Id: I12b7828a108fc6fd764dc8dfc716615033acb885<br>Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com><br>---<br>M src/mainboard/cavium/cn8100_sff_evb/bootblock.c<br>M src/mainboard/cavium/cn8100_sff_evb/romstage.c<br>M src/soc/cavium/cn81xx/Makefile.inc<br>M src/soc/cavium/cn81xx/bootblock.c<br>D src/soc/cavium/cn81xx/include/soc/timer.h<br>D src/soc/cavium/cn81xx/timer.c<br>M src/soc/cavium/common/Makefile.inc<br>A src/soc/cavium/common/include/soc/timer.h<br>A src/soc/cavium/common/timer.c<br>D src/soc/cavium/common/wdt.c<br>10 files changed, 247 insertions(+), 262 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/23775/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/cavium/cn8100_sff_evb/bootblock.c b/src/mainboard/cavium/cn8100_sff_evb/bootblock.c</span><br><span>index 6b5f45c..f1e3d60 100644</span><br><span>--- a/src/mainboard/cavium/cn8100_sff_evb/bootblock.c</span><br><span>+++ b/src/mainboard/cavium/cn8100_sff_evb/bootblock.c</span><br><span>@@ -58,22 +58,7 @@</span><br><span> void bootblock_mainboard_init(void)</span><br><span> {</span><br><span> struct spi_slave slave;</span><br><span style="color: hsl(0, 100%, 40%);">-#if 0</span><br><span style="color: hsl(0, 100%, 40%);">- if (rkclk_was_watchdog_reset())</span><br><span style="color: hsl(0, 100%, 40%);">- reboot_from_watchdog();</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "hello from %s, %s addr: %p\n", __func__, __func__, &bootblock_mainboard_init);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#if 0</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "spot checking timer...\n");</span><br><span style="color: hsl(0, 100%, 40%);">- int i;</span><br><span style="color: hsl(0, 100%, 40%);">- for (i = 0; i < 5; i++) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "i: %d\n", i);</span><br><span style="color: hsl(0, 100%, 40%);">- mdelay(1000);</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "hello from %s, addr: %p\n", __func__, &bootblock_mainboard_init);</span><br><span> printk(BIOS_DEBUG, "%s: spi_ctrlr_bus_map_count: %zu, &spi_ctrlr_bus_map_count: %p\n",</span><br><span> __func__, spi_ctrlr_bus_map_count, &spi_ctrlr_bus_map_count);</span><br><span> slave.ctrlr = spi_ctrlr_bus_map[0].ctrlr;</span><br><span>diff --git a/src/mainboard/cavium/cn8100_sff_evb/romstage.c b/src/mainboard/cavium/cn8100_sff_evb/romstage.c</span><br><span>index 096affe..55aa529 100644</span><br><span>--- a/src/mainboard/cavium/cn8100_sff_evb/romstage.c</span><br><span>+++ b/src/mainboard/cavium/cn8100_sff_evb/romstage.c</span><br><span>@@ -82,7 +82,7 @@</span><br><span> // bdk_boot_bgx(); /* ethernet */</span><br><span> // bdk_boot_usb();</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- watchdog_poke();</span><br><span style="color: hsl(120, 100%, 40%);">+ watchdog_poke(0);</span><br><span> </span><br><span> // bdk_boot_gpio();</span><br><span> // bdk_boot_pcie();</span><br><span>diff --git a/src/soc/cavium/cn81xx/Makefile.inc b/src/soc/cavium/cn81xx/Makefile.inc</span><br><span>index 6c129e8..91d71dd 100644</span><br><span>--- a/src/soc/cavium/cn81xx/Makefile.inc</span><br><span>+++ b/src/soc/cavium/cn81xx/Makefile.inc</span><br><span>@@ -31,8 +31,6 @@</span><br><span> bootblock-y += l2c.c</span><br><span> bootblock-y += mmu_operations.c</span><br><span> #bootblock-y += sdram.c</span><br><span style="color: hsl(0, 100%, 40%);">-bootblock-y += timer.c</span><br><span style="color: hsl(0, 100%, 40%);">-bootblock-y += ../common/wdt.c</span><br><span> </span><br><span> romstage-y += twsi.c</span><br><span> </span><br><span>@@ -77,8 +75,7 @@</span><br><span> #verstage-y += ../common/i2c.c</span><br><span> #verstage-y += spi.c</span><br><span> #verstage-$(CONFIG_DRIVERS_UART) += uart.c</span><br><span style="color: hsl(0, 100%, 40%);">-#verstage-y += timer.c</span><br><span style="color: hsl(0, 100%, 40%);">-verstage-y += ../common/wdt.c</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> </span><br><span> ################################################################################</span><br><span> </span><br><span>@@ -87,10 +84,8 @@</span><br><span> romstage-$(CONFIG_DRIVERS_UART) += uart.c</span><br><span> romstage-y += mmu_operations.c</span><br><span> #romstage-y += ../common/pwm.c</span><br><span style="color: hsl(0, 100%, 40%);">-romstage-y += timer.c</span><br><span> #romstage-y += gpio.c</span><br><span> #romstage-y += ../common/gpio.c</span><br><span style="color: hsl(0, 100%, 40%);">-romstage-y += ../common/wdt.c</span><br><span> </span><br><span> ################################################################################</span><br><span> </span><br><span>@@ -103,8 +98,6 @@</span><br><span> #ramstage-y += gpio.c</span><br><span> #ramstage-y += ../common/i2c.c</span><br><span> #ramstage-y += soc.c</span><br><span style="color: hsl(0, 100%, 40%);">-ramstage-y += timer.c</span><br><span style="color: hsl(0, 100%, 40%);">-ramstage-y += ../common/wdt.c</span><br><span> </span><br><span> ramstage-y += bl31_plat_params.c</span><br><span> #BL31_MAKEARGS += PLAT=qemu M0_CROSS_COMPILE="$(CROSS_COMPILE_arm)"</span><br><span>diff --git a/src/soc/cavium/cn81xx/bootblock.c b/src/soc/cavium/cn81xx/bootblock.c</span><br><span>index 2be7b6b..66fb98c 100644</span><br><span>--- a/src/soc/cavium/cn81xx/bootblock.c</span><br><span>+++ b/src/soc/cavium/cn81xx/bootblock.c</span><br><span>@@ -101,7 +101,9 @@</span><br><span> /* initialize system registers */</span><br><span> init_sysreg();</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- watchdog_poke();</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Set watchdog to 5 seconds timeout */</span><br><span style="color: hsl(120, 100%, 40%);">+ watchdog_set(0, 5000);</span><br><span style="color: hsl(120, 100%, 40%);">+ watchdog_poke(0);</span><br><span> </span><br><span> /* TODO: additional clock init? */</span><br><span> /* TODO: additional trustzone init? mark cache or RAM non-secure? */</span><br><span>diff --git a/src/soc/cavium/cn81xx/include/soc/timer.h b/src/soc/cavium/cn81xx/include/soc/timer.h</span><br><span>deleted file mode 100644</span><br><span>index 788e998..0000000</span><br><span>--- a/src/soc/cavium/cn81xx/include/soc/timer.h</span><br><span>+++ /dev/null</span><br><span>@@ -1,76 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright 2017-present Facebook, Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * SPDX-License-Identifier: BSD-3-Clause</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef __SOC_CAVIUM_CN81XX_TIMER_H__</span><br><span style="color: hsl(0, 100%, 40%);">-#define __SOC_CAVIUM_CN81XX_TIMER_H__</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#include <inttypes.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/addressmap.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <types.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <timer.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* Global System Timers Unit (GTI) registers */</span><br><span style="color: hsl(0, 100%, 40%);">-struct cn81xx_timer {</span><br><span style="color: hsl(0, 100%, 40%);">- u32 cc_cntcr;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 cc_cntsr;</span><br><span style="color: hsl(0, 100%, 40%);">- u64 cc_cntcv;</span><br><span style="color: hsl(0, 100%, 40%);">- u8 rsvd[0x10];</span><br><span style="color: hsl(0, 100%, 40%);">- u32 cc_cntfid0;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 cc_cntfid1;</span><br><span style="color: hsl(0, 100%, 40%);">- u8 rsvd2[0x98];</span><br><span style="color: hsl(0, 100%, 40%);">- u32 cc_cntrate;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 cc_cntracc;</span><br><span style="color: hsl(0, 100%, 40%);">- u64 cc_cntadd;</span><br><span style="color: hsl(0, 100%, 40%);">- u64 cc_cntmb;</span><br><span style="color: hsl(0, 100%, 40%);">- u64 cc_cntmbts;</span><br><span style="color: hsl(0, 100%, 40%);">- u64 cc_cntmb_int;</span><br><span style="color: hsl(0, 100%, 40%);">- u64 cc_cntmb_int_set;</span><br><span style="color: hsl(0, 100%, 40%);">- u64 cc_cntmb_int_ena_clr;</span><br><span style="color: hsl(0, 100%, 40%);">- u64 cc_cntmb_int_ena_set;</span><br><span style="color: hsl(0, 100%, 40%);">- u64 cc_imp_ctl;</span><br><span style="color: hsl(0, 100%, 40%);">- u8 skip[0x1fef8];</span><br><span style="color: hsl(0, 100%, 40%);">- u32 ctl_cntfrq;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 ctl_cntnsar;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 ctl_cnttidr;</span><br><span style="color: hsl(0, 100%, 40%);">- u8 rsvd3[0x34];</span><br><span style="color: hsl(0, 100%, 40%);">- u32 ctl_cntacr0;</span><br><span style="color: hsl(0, 100%, 40%);">- u8 skip2[0x1ffb8];</span><br><span style="color: hsl(0, 100%, 40%);">- u64 cwd_wdog0; /* there are 48 of these */</span><br><span style="color: hsl(0, 100%, 40%);">- u8 skip3[0xfff8];</span><br><span style="color: hsl(0, 100%, 40%);">- u64 cwd_poke0; /* there are 48 of these */</span><br><span style="color: hsl(0, 100%, 40%);">-};</span><br><span style="color: hsl(0, 100%, 40%);">-check_member(cn81xx_timer, cc_imp_ctl, 0x100);</span><br><span style="color: hsl(0, 100%, 40%);">-check_member(cn81xx_timer, ctl_cntacr0, 0x20040);</span><br><span style="color: hsl(0, 100%, 40%);">-check_member(cn81xx_timer, cwd_wdog0, 0x40000);</span><br><span style="color: hsl(0, 100%, 40%);">-check_member(cn81xx_timer, cwd_poke0, 0x50000);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* Watchdog functions */</span><br><span style="color: hsl(0, 100%, 40%);">-/* TODO: Currently we assume we're working with WDT0. We could pass</span><br><span style="color: hsl(0, 100%, 40%);">- * in a cn81xx_timer as a parameter in case we want to use others. */</span><br><span style="color: hsl(0, 100%, 40%);">-void watchdog_set(unsigned int timeout_ms);</span><br><span style="color: hsl(0, 100%, 40%);">-void watchdog_poke(void);</span><br><span style="color: hsl(0, 100%, 40%);">-void watchdog_disable(void);</span><br><span style="color: hsl(0, 100%, 40%);">-int watchdog_is_running(void);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#define GTI_CC_CNTCR_EN (1 << 0)</span><br><span style="color: hsl(0, 100%, 40%);">-#define GTI_CC_CNTCR_HDBG (1 << 1)</span><br><span style="color: hsl(0, 100%, 40%);">-#define GTI_CC_CNTCR_FCREQ (1 << 8)</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#define GTI_CC_CNTSR_DBGH (1 << 1)</span><br><span style="color: hsl(0, 100%, 40%);">-#define GTI_CC_CNTSR_FCACK (1 << 8)</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#define GTI_CWD_WDOG_MODE_SHIFT 0</span><br><span style="color: hsl(0, 100%, 40%);">-#define GTI_CWD_WDOG_MODE_MASK 0x3</span><br><span style="color: hsl(0, 100%, 40%);">-#define GTI_CWD_WDOG_STATE_SHIFT 2</span><br><span style="color: hsl(0, 100%, 40%);">-#define GTI_CWD_WDOG_STATE_MASK 0x3</span><br><span style="color: hsl(0, 100%, 40%);">-#define GTI_CWD_WDOG_LEN_SHIFT 4</span><br><span style="color: hsl(0, 100%, 40%);">-#define GTI_CWD_WDOG_LEN_MASK 0xffff</span><br><span style="color: hsl(0, 100%, 40%);">-#define GTI_CWD_WDOG_CNT_SHIFT 20</span><br><span style="color: hsl(0, 100%, 40%);">-#define GTI_CWD_WDOG_CNT_MASK 0xffffff</span><br><span style="color: hsl(0, 100%, 40%);">-#define GTI_CWD_WDOC_DSTOP (1 << 44)</span><br><span style="color: hsl(0, 100%, 40%);">-#define GTI_CWD_WDOC_GSTOP (1 << 45)</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#endif /* __SOC_CAVIUM_CN81XX_TIMER_H__ */</span><br><span>diff --git a/src/soc/cavium/cn81xx/timer.c b/src/soc/cavium/cn81xx/timer.c</span><br><span>deleted file mode 100644</span><br><span>index a60d5cb..0000000</span><br><span>--- a/src/soc/cavium/cn81xx/timer.c</span><br><span>+++ /dev/null</span><br><span>@@ -1,72 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (c) 2003-2017 Cavium Inc. (support@cavium.com). All rights</span><br><span style="color: hsl(0, 100%, 40%);">- * reserved.</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright 2017-present Facebook, Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * SPDX-License-Identifier: BSD-3-Clause</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/io.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/sysreg.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <delay.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <endian.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/asm.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/clock.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/timer.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <stdint.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <timer.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static uint64_t timer_raw_value(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- struct cn81xx_timer *timer = (void *)GTI_PF_BAR0;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return read64(&timer->cc_cntcv);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void timer_monotonic_get(struct mono_time *mt)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- mono_time_set_usecs(mt, timer_raw_value());</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void init_timer(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- struct cn81xx_timer *gti = (struct cn81xx_timer *)GTI_PF_BAR0;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Check if the counter was already setup */</span><br><span style="color: hsl(0, 100%, 40%);">- if (gti->cc_cntcr & GTI_CC_CNTCR_EN)</span><br><span style="color: hsl(0, 100%, 40%);">- return;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Configure GTI to tick at BDK_GTI_RATE */</span><br><span style="color: hsl(0, 100%, 40%);">- u64 sclk = thunderx_get_io_clock();</span><br><span style="color: hsl(0, 100%, 40%);">-#if 0</span><br><span style="color: hsl(0, 100%, 40%);">- /*</span><br><span style="color: hsl(0, 100%, 40%);">- * FIXME(dhendrix): Had difficulty using reference code's way of</span><br><span style="color: hsl(0, 100%, 40%);">- * setting up timer, the cntcv value didn't increment as expected.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">- u64 inc = (BDK_GTI_RATE << 32) / sclk;</span><br><span style="color: hsl(0, 100%, 40%);">- write32(>i->cc_cntrate, inc);</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">- /* Let's try using sclk only */</span><br><span style="color: hsl(0, 100%, 40%);">- write32(>i->cc_cntfid0, sclk); /* TODO: ref. code didn't set cntfid0? */</span><br><span style="color: hsl(0, 100%, 40%);">- write32(>i->ctl_cntfrq, sclk);</span><br><span style="color: hsl(0, 100%, 40%);">- write32(>i->cc_cntrate, ((1ULL << 32) * 1000000) / sclk);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Enable the counter */</span><br><span style="color: hsl(0, 100%, 40%);">- setbits_le32(>i->cc_cntcr, GTI_CC_CNTCR_EN);</span><br><span style="color: hsl(0, 100%, 40%);">- read32(>i->cc_cntcr); /* FIXME: is this needed? */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Enable the core timer */</span><br><span style="color: hsl(0, 100%, 40%);">- BDK_MSR(CNTFRQ_EL0, 100000000ull); /* Needed for Asim (FIXME: not needed for HW?) */</span><br><span style="color: hsl(0, 100%, 40%);">-#if 0</span><br><span style="color: hsl(0, 100%, 40%);">- bdk_ap_cntps_ctl_el1_t cntps_ctl_el1;</span><br><span style="color: hsl(0, 100%, 40%);">- cntps_ctl_el1.u = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- cntps_ctl_el1.s.imask = 1;</span><br><span style="color: hsl(0, 100%, 40%);">- cntps_ctl_el1.s.enable = 1;</span><br><span style="color: hsl(0, 100%, 40%);">- BDK_MSR(CNTPS_CTL_EL1, cntps_ctl_el1.u);</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">- u32 u = (CNTPS_CTL_EL1_IMASK | CNTPS_CTL_EL1_EN);</span><br><span style="color: hsl(0, 100%, 40%);">- BDK_MSR(CNTPS_CTL_EL1, u);</span><br><span style="color: hsl(0, 100%, 40%);">- return;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/soc/cavium/common/Makefile.inc b/src/soc/cavium/common/Makefile.inc</span><br><span>index f51e13e..83e81a7 100644</span><br><span>--- a/src/soc/cavium/common/Makefile.inc</span><br><span>+++ b/src/soc/cavium/common/Makefile.inc</span><br><span>@@ -19,18 +19,21 @@</span><br><span> bootblock-y += twsi.c</span><br><span> bootblock-y += clock.c</span><br><span> bootblock-y += gpio.c</span><br><span style="color: hsl(120, 100%, 40%);">+bootblock-y += timer.c</span><br><span> </span><br><span> </span><br><span> </span><br><span> romstage-y += twsi.c</span><br><span> romstage-y += clock.c</span><br><span> romstage-y += gpio.c</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-y += timer.c</span><br><span> </span><br><span> </span><br><span> </span><br><span> ramstage-y += twsi.c</span><br><span> ramstage-y += clock.c</span><br><span> ramstage-y += gpio.c</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-y += timer.c</span><br><span> </span><br><span> CPPFLAGS_common += -Isrc/soc/cavium/common/include</span><br><span> </span><br><span>diff --git a/src/soc/cavium/common/include/soc/timer.h b/src/soc/cavium/common/include/soc/timer.h</span><br><span>new file mode 100644</span><br><span>index 0000000..6d48831</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/cavium/common/include/soc/timer.h</span><br><span>@@ -0,0 +1,20 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright 2017-present Facebook, Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * SPDX-License-Identifier: BSD-3-Clause</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef __SOC_CAVIUM_CN81XX_TIMER_H__</span><br><span style="color: hsl(120, 100%, 40%);">+#define __SOC_CAVIUM_CN81XX_TIMER_H__</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <inttypes.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <types.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <timer.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* Watchdog functions */</span><br><span style="color: hsl(120, 100%, 40%);">+void watchdog_set(const size_t index, unsigned int timeout_ms);</span><br><span style="color: hsl(120, 100%, 40%);">+void watchdog_poke(const size_t index);</span><br><span style="color: hsl(120, 100%, 40%);">+void watchdog_disable(const size_t index);</span><br><span style="color: hsl(120, 100%, 40%);">+int watchdog_is_running(const size_t index);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#endif /* __SOC_CAVIUM_CN81XX_TIMER_H__ */</span><br><span>diff --git a/src/soc/cavium/common/timer.c b/src/soc/cavium/common/timer.c</span><br><span>new file mode 100644</span><br><span>index 0000000..ee8d639</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/cavium/common/timer.c</span><br><span>@@ -0,0 +1,218 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (c) 2003-2017 Cavium Inc. (support@cavium.com). All rights</span><br><span style="color: hsl(120, 100%, 40%);">+ * reserved.</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright 2018-present Facebook, Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * SPDX-License-Identifier: BSD-3-Clause</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/io.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <inttypes.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/clock.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/timer.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <stdint.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <timer.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/addressmap.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <assert.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* Global System Timers Unit (GTI) registers */</span><br><span style="color: hsl(120, 100%, 40%);">+struct cn81xx_timer {</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 cc_cntcr;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 cc_cntsr;</span><br><span style="color: hsl(120, 100%, 40%);">+ u64 cc_cntcv;</span><br><span style="color: hsl(120, 100%, 40%);">+ u8 rsvd[0x10];</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 cc_cntfid0;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 cc_cntfid1;</span><br><span style="color: hsl(120, 100%, 40%);">+ u8 rsvd2[0x98];</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 cc_cntrate;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 cc_cntracc;</span><br><span style="color: hsl(120, 100%, 40%);">+ u64 cc_cntadd;</span><br><span style="color: hsl(120, 100%, 40%);">+ u64 cc_cntmb;</span><br><span style="color: hsl(120, 100%, 40%);">+ u64 cc_cntmbts;</span><br><span style="color: hsl(120, 100%, 40%);">+ u64 cc_cntmb_int;</span><br><span style="color: hsl(120, 100%, 40%);">+ u64 cc_cntmb_int_set;</span><br><span style="color: hsl(120, 100%, 40%);">+ u64 cc_cntmb_int_ena_clr;</span><br><span style="color: hsl(120, 100%, 40%);">+ u64 cc_cntmb_int_ena_set;</span><br><span style="color: hsl(120, 100%, 40%);">+ u64 cc_imp_ctl;</span><br><span style="color: hsl(120, 100%, 40%);">+ u8 skip[0x1fef8];</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 ctl_cntfrq;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 ctl_cntnsar;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 ctl_cnttidr;</span><br><span style="color: hsl(120, 100%, 40%);">+ u8 rsvd3[0x34];</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 ctl_cntacr0;</span><br><span style="color: hsl(120, 100%, 40%);">+ u8 skip2[0x1ffb8];</span><br><span style="color: hsl(120, 100%, 40%);">+ u64 cwd_wdog[48]; /* Offset 0x40000 */</span><br><span style="color: hsl(120, 100%, 40%);">+ u8 skip3[0xfe80];</span><br><span style="color: hsl(120, 100%, 40%);">+ u64 cwd_poke[48]; /* Offset 0x50000 */</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+check_member(cn81xx_timer, cc_imp_ctl, 0x100);</span><br><span style="color: hsl(120, 100%, 40%);">+check_member(cn81xx_timer, ctl_cntacr0, 0x20040);</span><br><span style="color: hsl(120, 100%, 40%);">+check_member(cn81xx_timer, cwd_wdog[0], 0x40000);</span><br><span style="color: hsl(120, 100%, 40%);">+check_member(cn81xx_timer, cwd_poke[0], 0x50000);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define GTI_CC_CNTCR_EN (1 << 0)</span><br><span style="color: hsl(120, 100%, 40%);">+#define GTI_CC_CNTCR_HDBG (1 << 1)</span><br><span style="color: hsl(120, 100%, 40%);">+#define GTI_CC_CNTCR_FCREQ (1 << 8)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define GTI_CC_CNTSR_DBGH (1 << 1)</span><br><span style="color: hsl(120, 100%, 40%);">+#define GTI_CC_CNTSR_FCACK (1 << 8)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define GTI_CWD_WDOG_MODE_SHIFT 0</span><br><span style="color: hsl(120, 100%, 40%);">+#define GTI_CWD_WDOG_MODE_MASK 0x3</span><br><span style="color: hsl(120, 100%, 40%);">+#define GTI_CWD_WDOG_STATE_SHIFT 2</span><br><span style="color: hsl(120, 100%, 40%);">+#define GTI_CWD_WDOG_STATE_MASK 0x3</span><br><span style="color: hsl(120, 100%, 40%);">+#define GTI_CWD_WDOG_LEN_SHIFT 4</span><br><span style="color: hsl(120, 100%, 40%);">+#define GTI_CWD_WDOG_LEN_MASK 0xffff</span><br><span style="color: hsl(120, 100%, 40%);">+#define GTI_CWD_WDOG_CNT_SHIFT 20</span><br><span style="color: hsl(120, 100%, 40%);">+#define GTI_CWD_WDOG_CNT_MASK 0xffffff</span><br><span style="color: hsl(120, 100%, 40%);">+#define GTI_CWD_WDOC_DSTOP (1 << 44)</span><br><span style="color: hsl(120, 100%, 40%);">+#define GTI_CWD_WDOC_GSTOP (1 << 45)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static uint64_t timer_raw_value(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct cn81xx_timer *timer = (void *)GTI_PF_BAR0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return read64(&timer->cc_cntcv);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/**</span><br><span style="color: hsl(120, 100%, 40%);">+ * Get GTI counter value.</span><br><span style="color: hsl(120, 100%, 40%);">+ * @param mt Structure to fill</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+void timer_monotonic_get(struct mono_time *mt)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ mono_time_set_usecs(mt, timer_raw_value());</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/**</span><br><span style="color: hsl(120, 100%, 40%);">+ * Init Global System Timers Unit (GTI).</span><br><span style="color: hsl(120, 100%, 40%);">+ * Configure timer to run at 1MHz tick-rate.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+void init_timer(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct cn81xx_timer *gti = (struct cn81xx_timer *)GTI_PF_BAR0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Check if the counter was already setup */</span><br><span style="color: hsl(120, 100%, 40%);">+ if (gti->cc_cntcr & GTI_CC_CNTCR_EN)</span><br><span style="color: hsl(120, 100%, 40%);">+ return;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ u64 sclk = thunderx_get_io_clock();</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Use coprocessor clock source */</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(>i->cc_imp_ctl, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Setup counter to operate at 1MHz */</span><br><span style="color: hsl(120, 100%, 40%);">+ const size_t tickrate = 1000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(>i->cc_cntfid0, tickrate);</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(>i->ctl_cntfrq, tickrate);</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(>i->cc_cntrate, ((1ULL << 32) * tickrate) / sclk);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Enable the counter */</span><br><span style="color: hsl(120, 100%, 40%);">+ setbits_le32(>i->cc_cntcr, GTI_CC_CNTCR_EN);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ //u32 u = (CNTPS_CTL_EL1_IMASK | CNTPS_CTL_EL1_EN);</span><br><span style="color: hsl(120, 100%, 40%);">+ //BDK_MSR(CNTPS_CTL_EL1, u);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/**</span><br><span style="color: hsl(120, 100%, 40%);">+ * Setup the watchdog to expire in timeout_ms milliseconds. When the watchdog</span><br><span style="color: hsl(120, 100%, 40%);">+ * expires, the chip three things happen:</span><br><span style="color: hsl(120, 100%, 40%);">+ * 1) Expire 1: interrupt that is ignored by the BDK</span><br><span style="color: hsl(120, 100%, 40%);">+ * 2) Expire 2: DEL3T interrupt, which is disabled and ignored</span><br><span style="color: hsl(120, 100%, 40%);">+ * 3) Expire 3: Soft reset of the chip</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Since we want a soft reset, we actually program the watchdog to expire at</span><br><span style="color: hsl(120, 100%, 40%);">+ * the timeout / 3.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * @param index Index of watchdog to configure</span><br><span style="color: hsl(120, 100%, 40%);">+ * @param timeout_ms Timeout in milliseconds.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+void watchdog_set(const size_t index, unsigned int timeout_ms)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t sclk = thunderx_get_io_clock();</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t timeout_sclk = sclk * timeout_ms / 1000;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct cn81xx_timer *timer = (struct cn81xx_timer *)GTI_PF_BAR0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ assert(index < ARRAY_SIZE(timer->cwd_wdog));</span><br><span style="color: hsl(120, 100%, 40%);">+ if (index >= ARRAY_SIZE(timer->cwd_wdog))</span><br><span style="color: hsl(120, 100%, 40%);">+ return;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Per comment above, we want the watchdog to expire at 3x the rate</span><br><span style="color: hsl(120, 100%, 40%);">+ * specified</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ timeout_sclk /= 3;</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Watchdog counts in 1024 cycle steps */</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t timeout_wdog = timeout_sclk >> 10;</span><br><span style="color: hsl(120, 100%, 40%);">+ /* We can only specify the upper 16 bits of a 24 bit value. Round up */</span><br><span style="color: hsl(120, 100%, 40%);">+ timeout_wdog = (timeout_wdog + 0xff) >> 8;</span><br><span style="color: hsl(120, 100%, 40%);">+ /* If the timeout overflows the hardware limit, set max */</span><br><span style="color: hsl(120, 100%, 40%);">+ if (timeout_wdog >= 0x10000)</span><br><span style="color: hsl(120, 100%, 40%);">+ timeout_wdog = 0xffff;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "Watchdog: Set to expire %zu SCLK cycles\n",</span><br><span style="color: hsl(120, 100%, 40%);">+ timeout_wdog << 18);</span><br><span style="color: hsl(120, 100%, 40%);">+ clrsetbits_le64(&timer->cwd_wdog[index],</span><br><span style="color: hsl(120, 100%, 40%);">+ (GTI_CWD_WDOG_LEN_MASK << GTI_CWD_WDOG_LEN_SHIFT) |</span><br><span style="color: hsl(120, 100%, 40%);">+ (GTI_CWD_WDOG_MODE_MASK << GTI_CWD_WDOG_MODE_SHIFT),</span><br><span style="color: hsl(120, 100%, 40%);">+ (timeout_wdog << GTI_CWD_WDOG_LEN_SHIFT) |</span><br><span style="color: hsl(120, 100%, 40%);">+ (3 << GTI_CWD_WDOG_MODE_SHIFT));</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/**</span><br><span style="color: hsl(120, 100%, 40%);">+ * Signal the watchdog that we are still running.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * @param index Index of watchdog to configure.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+void watchdog_poke(const size_t index)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct cn81xx_timer *timer = (struct cn81xx_timer *)GTI_PF_BAR0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ assert(index < ARRAY_SIZE(timer->cwd_poke));</span><br><span style="color: hsl(120, 100%, 40%);">+ if (index >= ARRAY_SIZE(timer->cwd_poke))</span><br><span style="color: hsl(120, 100%, 40%);">+ return;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ write64(&timer->cwd_poke[0], 0);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/**</span><br><span style="color: hsl(120, 100%, 40%);">+ * Disable the hardware watchdog</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * @param index Index of watchdog to configure.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+void watchdog_disable(const size_t index)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct cn81xx_timer *timer = (struct cn81xx_timer *)GTI_PF_BAR0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ assert(index < ARRAY_SIZE(timer->cwd_wdog));</span><br><span style="color: hsl(120, 100%, 40%);">+ if (index >= ARRAY_SIZE(timer->cwd_wdog))</span><br><span style="color: hsl(120, 100%, 40%);">+ return;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ write64(&timer->cwd_wdog[index], 0);</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "Watchdog: Disabled\n");</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/**</span><br><span style="color: hsl(120, 100%, 40%);">+ * Return true if the watchdog is configured and running</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * @param index Index of watchdog to configure.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * @return Non-zero if watchdog is running.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+int watchdog_is_running(const size_t index)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct cn81xx_timer *timer = (struct cn81xx_timer *)GTI_PF_BAR0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ assert(index < ARRAY_SIZE(timer->cwd_wdog));</span><br><span style="color: hsl(120, 100%, 40%);">+ if (index >= ARRAY_SIZE(timer->cwd_wdog))</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ uint64_t val = read64(&timer->cwd_wdog[index]);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return !!(val & (GTI_CWD_WDOG_MODE_MASK << GTI_CWD_WDOG_MODE_SHIFT));</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/soc/cavium/common/wdt.c b/src/soc/cavium/common/wdt.c</span><br><span>deleted file mode 100644</span><br><span>index 9b0f28f..0000000</span><br><span>--- a/src/soc/cavium/common/wdt.c</span><br><span>+++ /dev/null</span><br><span>@@ -1,88 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (c) 2003-2017 Cavium Inc. (support@cavium.com). All rights</span><br><span style="color: hsl(0, 100%, 40%);">- * reserved.</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright 2018-present Facebook, Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * SPDX-License-Identifier: BSD-3-Clause</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/io.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <console/console.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <inttypes.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/clock.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/timer.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/**</span><br><span style="color: hsl(0, 100%, 40%);">- * Setup the watchdog to expire in timeout_ms milliseconds. When the watchdog</span><br><span style="color: hsl(0, 100%, 40%);">- * expires, the chip three things happen:</span><br><span style="color: hsl(0, 100%, 40%);">- * 1) Expire 1: interrupt that is ignored by the BDK</span><br><span style="color: hsl(0, 100%, 40%);">- * 2) Expire 2: DEL3T interrupt, which is disabled and ignored</span><br><span style="color: hsl(0, 100%, 40%);">- * 3) Expire 3: Soft reset of the chip</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Since we want a soft reset, we actually program the watchdog to expire at</span><br><span style="color: hsl(0, 100%, 40%);">- * the timeout / 3.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * @param timeout_ms Timeout in milliseconds. If this is zero, the timeout is taken from the</span><br><span style="color: hsl(0, 100%, 40%);">- * global configuration option BDK_BRD_CFG_WATCHDOG_TIMEOUT</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-void watchdog_set(unsigned int timeout_ms)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t sclk = thunderx_get_io_clock();</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t timeout_sclk = sclk * timeout_ms / 1000;</span><br><span style="color: hsl(0, 100%, 40%);">- /* Per comment above, we want the watchdog to expire at 3x the rate specified */</span><br><span style="color: hsl(0, 100%, 40%);">- timeout_sclk /= 3;</span><br><span style="color: hsl(0, 100%, 40%);">- /* Watchdog counts in 1024 cycle steps */</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t timeout_wdog = timeout_sclk >> 10;</span><br><span style="color: hsl(0, 100%, 40%);">- /* We can only specify the upper 16 bits of a 24 bit value. Round up */</span><br><span style="color: hsl(0, 100%, 40%);">- timeout_wdog = (timeout_wdog + 0xff) >> 8;</span><br><span style="color: hsl(0, 100%, 40%);">- /* If the timeout overflows the hardware limit, set max */</span><br><span style="color: hsl(0, 100%, 40%);">- if (timeout_wdog >= 0x10000)</span><br><span style="color: hsl(0, 100%, 40%);">- timeout_wdog = 0xffff;</span><br><span style="color: hsl(0, 100%, 40%);">- </span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "Watchdog: Set to expire %llu SCLK cycles\n", timeout_wdog << 18);</span><br><span style="color: hsl(0, 100%, 40%);">- struct cn81xx_timer *timer = (struct cn81xx_timer *)GTI_PF_BAR0;</span><br><span style="color: hsl(0, 100%, 40%);">- clrsetbits_le64(&timer->cwd_wdog0,</span><br><span style="color: hsl(0, 100%, 40%);">- (GTI_CWD_WDOG_LEN_MASK << GTI_CWD_WDOG_LEN_SHIFT) |</span><br><span style="color: hsl(0, 100%, 40%);">- (GTI_CWD_WDOG_MODE_MASK << GTI_CWD_WDOG_MODE_SHIFT),</span><br><span style="color: hsl(0, 100%, 40%);">- (timeout_wdog << GTI_CWD_WDOG_LEN_SHIFT) |</span><br><span style="color: hsl(0, 100%, 40%);">- (3 << GTI_CWD_WDOG_MODE_SHIFT));</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/**</span><br><span style="color: hsl(0, 100%, 40%);">- * Signal the watchdog that we are still running</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-void watchdog_poke(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- struct cn81xx_timer *timer = (struct cn81xx_timer *)GTI_PF_BAR0;</span><br><span style="color: hsl(0, 100%, 40%);">- write64(&timer->cwd_poke0, 0);</span><br><span style="color: hsl(0, 100%, 40%);">-// BDK_CSR_WRITE(bdk_numa_local(), BDK_GTI_CWD_POKEX(bdk_get_core_num()), 0);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/**</span><br><span style="color: hsl(0, 100%, 40%);">- * Disable the hardware watchdog</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-void watchdog_disable(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- struct cn81xx_timer *timer = (struct cn81xx_timer *)GTI_PF_BAR0;</span><br><span style="color: hsl(0, 100%, 40%);">- write64(&timer->cwd_wdog0, 0);</span><br><span style="color: hsl(0, 100%, 40%);">-// BDK_CSR_WRITE(bdk_numa_local(), BDK_GTI_CWD_WDOGX(bdk_get_core_num()), 0);</span><br><span style="color: hsl(0, 100%, 40%);">-// BDK_TRACE(INIT, "Watchdog: Disabled\n");</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "Watchdog: Disabled\n");</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/**</span><br><span style="color: hsl(0, 100%, 40%);">- * Return true if the watchdog is configured and running</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * @return Non-zero if watchdog is running</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-int watchdog_is_running(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- struct cn81xx_timer *timer = (struct cn81xx_timer *)GTI_PF_BAR0;</span><br><span style="color: hsl(0, 100%, 40%);">- uint64_t val = read64(&timer->cwd_wdog0);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return !!(val & (GTI_CWD_WDOG_MODE_MASK << GTI_CWD_WDOG_MODE_SHIFT));</span><br><span style="color: hsl(0, 100%, 40%);">-// BDK_CSR_INIT(wdog, bdk_numa_local(), BDK_GTI_CWD_WDOGX(bdk_get_core_num()));</span><br><span style="color: hsl(0, 100%, 40%);">- // return wdog.s.mode != 0;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23775">change 23775</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23775"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I12b7828a108fc6fd764dc8dfc716615033acb885 </div>
<div style="display:none"> Gerrit-Change-Number: 23775 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Patrick Rudolph <patrick.rudolph@9elements.com> </div>