<p>Jonathan Neuschäfer has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23709">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/intel/gm45/raminit: Use CxDRT*_MCHBAR instead of magic numbers<br><br>This is hopefully more readable.<br><br>TEST=Build lenovo/x200 with and without this patch, compare<br>build/cbfs/fallback/romstage.elf, notice no substantial differences.<br><br>Change-Id: I079d5353633a3d58ce0e5e616f3fad687a064d65<br>Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net><br>---<br>M src/northbridge/intel/gm45/raminit.c<br>1 file changed, 6 insertions(+), 4 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/23709/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c</span><br><span>index a44e397..d4e60b7 100644</span><br><span>--- a/src/northbridge/intel/gm45/raminit.c</span><br><span>+++ b/src/northbridge/intel/gm45/raminit.c</span><br><span>@@ -1798,10 +1798,12 @@</span><br><span>      /* Perform receive-enable calibration. */</span><br><span>    raminit_receive_enable_calibration(timings, dimms);</span><br><span>  /* Lend clock values from receive-enable calibration. */</span><br><span style="color: hsl(0, 100%, 40%);">-        MCHBAR32(0x1224) = (MCHBAR32(0x1224) & ~(0xf0)) |</span><br><span style="color: hsl(0, 100%, 40%);">-                      ((((MCHBAR32(0x121c) >> 7) - 1) & 0xf) << 4);</span><br><span style="color: hsl(0, 100%, 40%);">-        MCHBAR32(0x1324) = (MCHBAR32(0x1324) & ~(0xf0)) |</span><br><span style="color: hsl(0, 100%, 40%);">-                      ((((MCHBAR32(0x131c) >> 7) - 1) & 0xf) << 4);</span><br><span style="color: hsl(120, 100%, 40%);">+      MCHBAR32(CxDRT5_MCHBAR(0)) =</span><br><span style="color: hsl(120, 100%, 40%);">+          (MCHBAR32(CxDRT5_MCHBAR(0)) & ~(0xf0)) |</span><br><span style="color: hsl(120, 100%, 40%);">+          ((((MCHBAR32(CxDRT3_MCHBAR(0)) >> 7) - 1) & 0xf) << 4);</span><br><span style="color: hsl(120, 100%, 40%);">+       MCHBAR32(CxDRT5_MCHBAR(1)) =</span><br><span style="color: hsl(120, 100%, 40%);">+          (MCHBAR32(CxDRT5_MCHBAR(1)) & ~(0xf0)) |</span><br><span style="color: hsl(120, 100%, 40%);">+          ((((MCHBAR32(CxDRT3_MCHBAR(1)) >> 7) - 1) & 0xf) << 4);</span><br><span> </span><br><span>  /* Perform read/write training for high clock rate. */</span><br><span>       if (timings->mem_clock == MEM_CLOCK_1067MT) {</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23709">change 23709</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23709"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I079d5353633a3d58ce0e5e616f3fad687a064d65 </div>
<div style="display:none"> Gerrit-Change-Number: 23709 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer@gmx.net> </div>