<p>Lijian Zhao has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23699">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/cannonlake: Use common PCR ASL<br><br>Switch to use common version of PCR asl.<br><br>BUG=NONE<br>TEST=Boot up into OS.<br><br>Change-Id: I4975704434d4743bcc0fb6062115da349166c3a6<br>Signed-off-by: Lijian Zhao <lijian.zhao@intel.com><br>---<br>D src/soc/intel/cannonlake/acpi/pcr.asl<br>M src/soc/intel/cannonlake/acpi/southbridge.asl<br>2 files changed, 1 insertion(+), 24 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/23699/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/cannonlake/acpi/pcr.asl b/src/soc/intel/cannonlake/acpi/pcr.asl</span><br><span>deleted file mode 100644</span><br><span>index 7915226..0000000</span><br><span>--- a/src/soc/intel/cannonlake/acpi/pcr.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,23 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2015 Google Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2017 Intel Corporation.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#include <intelblocks/pcr.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-Method (PCRB, 1, NotSerialized)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-   Return (Add (CONFIG_PCR_BASE_ADDRESS,</span><br><span style="color: hsl(0, 100%, 40%);">-                           ShiftLeft (Arg0, PCR_PORTID_SHIFT)))</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/soc/intel/cannonlake/acpi/southbridge.asl b/src/soc/intel/cannonlake/acpi/southbridge.asl</span><br><span>index d0d03f0..8d74da9 100644</span><br><span>--- a/src/soc/intel/cannonlake/acpi/southbridge.asl</span><br><span>+++ b/src/soc/intel/cannonlake/acpi/southbridge.asl</span><br><span>@@ -23,7 +23,7 @@</span><br><span> #include "scs.asl"</span><br><span> </span><br><span> /* PCR access */</span><br><span style="color: hsl(0, 100%, 40%);">-#include "pcr.asl"</span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/intel/common/acpi/pcr.asl></span><br><span> </span><br><span> /* GPIO controller */</span><br><span> #include "gpio.asl"</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23699">change 23699</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23699"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I4975704434d4743bcc0fb6062115da349166c3a6 </div>
<div style="display:none"> Gerrit-Change-Number: 23699 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com> </div>