<p>Jonathan Neuschäfer has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23710">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/x4x/raminit_ddr2: Refactor clock configuration slightly<br><br>The result is shorter and (IMHO) more readable code.<br><br>Change-Id: Ic51c05d7aa791250d775bd7a640213065d4caba0<br>Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net><br>---<br>M src/northbridge/intel/x4x/raminit_ddr2.c<br>1 file changed, 14 insertions(+), 17 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/23710/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/intel/x4x/raminit_ddr2.c b/src/northbridge/intel/x4x/raminit_ddr2.c</span><br><span>index e6ba2dc..e28a613 100644</span><br><span>--- a/src/northbridge/intel/x4x/raminit_ddr2.c</span><br><span>+++ b/src/northbridge/intel/x4x/raminit_ddr2.c</span><br><span>@@ -722,23 +722,20 @@</span><br><span>  }</span><br><span> </span><br><span>        FOR_EACH_POPULATED_CHANNEL(s->dimms, i) {</span><br><span style="color: hsl(0, 100%, 40%);">-            if (s->selected_timings.mem_clk == MEM_CLOCK_667MHz) {</span><br><span style="color: hsl(0, 100%, 40%);">-                       clkset0(i, &dll_setting_667[CLKSET0]);</span><br><span style="color: hsl(0, 100%, 40%);">-                      clkset1(i, &dll_setting_667[CLKSET1]);</span><br><span style="color: hsl(0, 100%, 40%);">-                      ctrlset0(i, &dll_setting_667[CTRL0]);</span><br><span style="color: hsl(0, 100%, 40%);">-                       ctrlset1(i, &dll_setting_667[CTRL1]);</span><br><span style="color: hsl(0, 100%, 40%);">-                       ctrlset2(i, &dll_setting_667[CTRL2]);</span><br><span style="color: hsl(0, 100%, 40%);">-                       ctrlset3(i, &dll_setting_667[CTRL3]);</span><br><span style="color: hsl(0, 100%, 40%);">-                       cmdset(i, &dll_setting_667[CMD]);</span><br><span style="color: hsl(0, 100%, 40%);">-           } else {</span><br><span style="color: hsl(0, 100%, 40%);">-                        clkset0(i, &dll_setting_800[CLKSET0]);</span><br><span style="color: hsl(0, 100%, 40%);">-                      clkset1(i, &dll_setting_800[CLKSET1]);</span><br><span style="color: hsl(0, 100%, 40%);">-                      ctrlset0(i, &dll_setting_800[CTRL0]);</span><br><span style="color: hsl(0, 100%, 40%);">-                       ctrlset1(i, &dll_setting_800[CTRL1]);</span><br><span style="color: hsl(0, 100%, 40%);">-                       ctrlset2(i, &dll_setting_800[CTRL2]);</span><br><span style="color: hsl(0, 100%, 40%);">-                       ctrlset3(i, &dll_setting_800[CTRL3]);</span><br><span style="color: hsl(0, 100%, 40%);">-                       cmdset(i, &dll_setting_800[CMD]);</span><br><span style="color: hsl(0, 100%, 40%);">-           }</span><br><span style="color: hsl(120, 100%, 40%);">+             struct dll_setting *setting;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+                if (s->selected_timings.mem_clk == MEM_CLOCK_667MHz)</span><br><span style="color: hsl(120, 100%, 40%);">+                       setting = dll_setting_667;</span><br><span style="color: hsl(120, 100%, 40%);">+            else</span><br><span style="color: hsl(120, 100%, 40%);">+                  setting = dll_setting_800;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+          clkset0(i, &setting[CLKSET0]);</span><br><span style="color: hsl(120, 100%, 40%);">+            clkset1(i, &setting[CLKSET1]);</span><br><span style="color: hsl(120, 100%, 40%);">+            ctrlset0(i, &setting[CTRL0]);</span><br><span style="color: hsl(120, 100%, 40%);">+             ctrlset1(i, &setting[CTRL1]);</span><br><span style="color: hsl(120, 100%, 40%);">+             ctrlset2(i, &setting[CTRL2]);</span><br><span style="color: hsl(120, 100%, 40%);">+             ctrlset3(i, &setting[CTRL3]);</span><br><span style="color: hsl(120, 100%, 40%);">+             cmdset(i, &setting[CMD]);</span><br><span>        }</span><br><span> </span><br><span>        // XXX if not async mode</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23710">change 23710</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23710"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ic51c05d7aa791250d775bd7a640213065d4caba0 </div>
<div style="display:none"> Gerrit-Change-Number: 23710 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer@gmx.net> </div>