<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23668">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/intel/sandybridge: Get rid off device_t<br><br>Use of `device_t` has been<br>abandoned in ramstage<br><br>Change-Id: I585aa48b99f4ef63905cab5d6d1502bfed0e6e42<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/northbridge/intel/sandybridge/gma.c<br>M src/northbridge/intel/sandybridge/northbridge.c<br>M src/northbridge/intel/sandybridge/sandybridge.h<br>3 files changed, 13 insertions(+), 13 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/23668/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c</span><br><span>index 74aabf9..201498a 100644</span><br><span>--- a/src/northbridge/intel/sandybridge/gma.c</span><br><span>+++ b/src/northbridge/intel/sandybridge/gma.c</span><br><span>@@ -662,7 +662,7 @@</span><br><span>   intel_gma_restore_opregion();</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)</span><br><span style="color: hsl(120, 100%, 40%);">+static void gma_set_subsystem(struct device *dev, unsigned vendor, unsigned device)</span><br><span> {</span><br><span>        if (!vendor || !device) {</span><br><span>            pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,</span><br><span>@@ -676,7 +676,7 @@</span><br><span> const struct i915_gpu_controller_info *</span><br><span> intel_gma_get_controller_info(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-   device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0));</span><br><span style="color: hsl(120, 100%, 40%);">+    struct device *dev = dev_find_slot(0, PCI_DEVFN(0x2,0));</span><br><span>     if (!dev) {</span><br><span>          return NULL;</span><br><span>         }</span><br><span>@@ -684,7 +684,7 @@</span><br><span>      return &chip->gfx;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void gma_ssdt(device_t device)</span><br><span style="color: hsl(120, 100%, 40%);">+static void gma_ssdt(struct device *device)</span><br><span> {</span><br><span>    const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();</span><br><span>        if (!gfx) {</span><br><span>@@ -729,7 +729,7 @@</span><br><span> static void gma_func0_disable(struct device *dev)</span><br><span> {</span><br><span>  u16 reg16;</span><br><span style="color: hsl(0, 100%, 40%);">-      device_t dev_host = dev_find_slot(0, PCI_DEVFN(0,0));</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev_host = dev_find_slot(0, PCI_DEVFN(0,0));</span><br><span> </span><br><span>      reg16 = pci_read_config16(dev_host, GGC);</span><br><span>    reg16 |= (1 << 1); /* disable VGA decode */</span><br><span>diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c</span><br><span>index 9fed17e..322e4b8 100644</span><br><span>--- a/src/northbridge/intel/sandybridge/northbridge.c</span><br><span>+++ b/src/northbridge/intel/sandybridge/northbridge.c</span><br><span>@@ -62,7 +62,7 @@</span><br><span> </span><br><span> static int get_pcie_bar(u32 *base)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-   device_t dev;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *dev;</span><br><span>  u32 pciexbar_reg;</span><br><span> </span><br><span>        *base = 0;</span><br><span>@@ -120,7 +120,7 @@</span><br><span>     }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pci_domain_set_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pci_domain_set_resources(struct device *dev)</span><br><span> {</span><br><span>  uint64_t tom, me_base, touud;</span><br><span>        uint32_t tseg_base, uma_size, tolud;</span><br><span>@@ -273,7 +273,7 @@</span><br><span>   .acpi_name        = northbridge_acpi_name,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void mc_read_resources(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void mc_read_resources(struct device *dev)</span><br><span> {</span><br><span>      u32 pcie_config_base;</span><br><span>        int buses;</span><br><span>@@ -287,7 +287,7 @@</span><br><span>     }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)</span><br><span style="color: hsl(120, 100%, 40%);">+static void intel_set_subsystem(struct device *dev, unsigned vendor, unsigned device)</span><br><span> {</span><br><span>        if (!vendor || !device) {</span><br><span>            pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,</span><br><span>@@ -457,7 +457,7 @@</span><br><span>       MCHBAR32(0x5500) = 0x00100001;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static u32 northbridge_get_base_reg(device_t dev, int reg)</span><br><span style="color: hsl(120, 100%, 40%);">+static u32 northbridge_get_base_reg(struct device *dev, int reg)</span><br><span> {</span><br><span>     u32 value;</span><br><span> </span><br><span>@@ -469,7 +469,7 @@</span><br><span> </span><br><span> u32 northbridge_get_tseg_base(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-    const device_t dev = dev_find_slot(0, PCI_DEVFN(0, 0));</span><br><span style="color: hsl(120, 100%, 40%);">+       struct device *dev = dev_find_slot(0, PCI_DEVFN(0, 0));</span><br><span> </span><br><span>  return northbridge_get_base_reg(dev, TSEG);</span><br><span> }</span><br><span>@@ -523,7 +523,7 @@</span><br><span>       .device = 0x0158, /* Ivy bridge */</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void cpu_bus_init(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void cpu_bus_init(struct device *dev)</span><br><span> {</span><br><span>        initialize_cpus(dev->link_list);</span><br><span> }</span><br><span>@@ -536,7 +536,7 @@</span><br><span>       .scan_bus         = 0,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void enable_dev(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void enable_dev(struct device *dev)</span><br><span> {</span><br><span>        /* Set the operations if it is a special bus type */</span><br><span>         if (dev->path.type == DEVICE_PATH_DOMAIN) {</span><br><span>diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h</span><br><span>index 8bbfae9..3d21d89 100644</span><br><span>--- a/src/northbridge/intel/sandybridge/sandybridge.h</span><br><span>+++ b/src/northbridge/intel/sandybridge/sandybridge.h</span><br><span>@@ -228,7 +228,7 @@</span><br><span> #include <device/device.h></span><br><span> </span><br><span> struct acpi_rsdp;</span><br><span style="color: hsl(0, 100%, 40%);">-unsigned long northbridge_write_acpi_tables(device_t device, unsigned long start, struct acpi_rsdp *rsdp);</span><br><span style="color: hsl(120, 100%, 40%);">+unsigned long northbridge_write_acpi_tables(struct device *device, unsigned long start, struct acpi_rsdp *rsdp);</span><br><span> #endif</span><br><span> </span><br><span> #endif</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23668">change 23668</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23668"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I585aa48b99f4ef63905cab5d6d1502bfed0e6e42 </div>
<div style="display:none"> Gerrit-Change-Number: 23668 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>