<p>Shelley Chen has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23647">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/google/fizz: Set SATA gpios in bootblock<br><br>Previously, we were seeing booting into recovery screen with error<br>code 0x5a.  This was root caused to the GPIOS not being initialized<br>soon enough, causing the SATA 1 detection to timeout and the device to<br>reboot into recovery with 0x5a.<br><br>BUG=b:69715162<br>BRANCH=None<br>TEST=after flashing BIOS, set gbb flags to 0, then<br>     type reboot from the OS.<br><br>Change-Id: I53913d5b7adaeb43edd0ef2d24a7cad92052d68a<br>Signed-off-by: Shelley Chen <shchen@chromium.org><br>---<br>M src/mainboard/google/fizz/gpio.h<br>1 file changed, 6 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/23647/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/fizz/gpio.h b/src/mainboard/google/fizz/gpio.h</span><br><span>index e6dc3a7..9a94af4 100644</span><br><span>--- a/src/mainboard/google/fizz/gpio.h</span><br><span>+++ b/src/mainboard/google/fizz/gpio.h</span><br><span>@@ -179,9 +179,9 @@</span><br><span> /* SATAXPCIE2 */        PAD_CFG_NF(GPP_E2, 20K_PU, DEEP,</span><br><span>                                NF1), /* DB_PCIE_SATA#_DET */</span><br><span> /* CPU_GP0 */               PAD_CFG_NC(GPP_E3),</span><br><span style="color: hsl(0, 100%, 40%);">-/* SATA_DEVSLP0 */   PAD_CFG_NC(GPP_E4),</span><br><span style="color: hsl(0, 100%, 40%);">-/* SATA_DEVSLP1 */   PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1), /* DEVSLP1_DB */</span><br><span style="color: hsl(0, 100%, 40%);">-/* SATA_DEVSLP2 */ PAD_CFG_NC(GPP_E6), /* TP328 */</span><br><span style="color: hsl(120, 100%, 40%);">+/* SATA_DEVSLP0 */     PAD_CFG_NC(GPP_E4), /* TP103 */</span><br><span style="color: hsl(120, 100%, 40%);">+/* SATA_DEVSLP1 */     PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1), /* DEVSLP1_MB */</span><br><span style="color: hsl(120, 100%, 40%);">+/* SATA_DEVSLP2 */       PAD_CFG_NC(GPP_E6), /* DEVSLP2_DB */</span><br><span> /* CPU_GP1 */           PAD_CFG_NC(GPP_E7),</span><br><span> /* SATALED# */           PAD_CFG_NC(GPP_E8), /* TP314 */</span><br><span> /* USB2_OCO# */              PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* USB-C */</span><br><span>@@ -276,6 +276,9 @@</span><br><span> /* UART2_TXD */               PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* SERVO */</span><br><span> /* UART2_CTS# */   PAD_CFG_GPI_GPIO_DRIVER(GPP_C23, NONE,</span><br><span>                                   DEEP), /* SCREW_SPI_WP_STATUS */</span><br><span style="color: hsl(120, 100%, 40%);">+/* SATAXPCIE1 */       PAD_CFG_NF(GPP_E1, NONE, DEEP,</span><br><span style="color: hsl(120, 100%, 40%);">+                             NF1), /* MB_PCIE_SATA#_DET */</span><br><span style="color: hsl(120, 100%, 40%);">+/* SATA_DEVSLP1 */     PAD_CFG_NF(GPP_E5, NONE, DEEP, NF1), /* DEVSLP1_MB */</span><br><span> };</span><br><span> </span><br><span> #endif</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23647">change 23647</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23647"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I53913d5b7adaeb43edd0ef2d24a7cad92052d68a </div>
<div style="display:none"> Gerrit-Change-Number: 23647 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Shelley Chen <shchen@google.com> </div>