<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23663">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/kontron/986lcd-m: Disable ethernet devices in ramstage<br><br>Move disabling PCIe ports and the respective ethernet port out of<br>romstage.<br><br>Change-Id: Ic8abc4c8289f5e34bbb7d5ee57d9a2f404e26189<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/mainboard/kontron/986lcd-m/mainboard.c<br>M src/mainboard/kontron/986lcd-m/romstage.c<br>2 files changed, 22 insertions(+), 22 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/23663/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/kontron/986lcd-m/mainboard.c b/src/mainboard/kontron/986lcd-m/mainboard.c</span><br><span>index d729533..5519f58 100644</span><br><span>--- a/src/mainboard/kontron/986lcd-m/mainboard.c</span><br><span>+++ b/src/mainboard/kontron/986lcd-m/mainboard.c</span><br><span>@@ -20,6 +20,8 @@</span><br><span> #include <pc80/mc146818rtc.h></span><br><span> #include <arch/io.h></span><br><span> #include <arch/interrupt.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pci_def.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <string.h></span><br><span> </span><br><span> /* Hardware Monitor */</span><br><span> </span><br><span>@@ -148,6 +150,25 @@</span><br><span>    hwm_write(0x40, 0x01); /* Init, but no SMI# */</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+static void disable_ethernet(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+        struct device *dev;</span><br><span style="color: hsl(120, 100%, 40%);">+   int i;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+      for (i = 0; i < 3; i++) {</span><br><span style="color: hsl(120, 100%, 40%);">+          char buffer[10];</span><br><span style="color: hsl(120, 100%, 40%);">+              snprintf(buffer, sizeof(buffer), "ethernet%d", i + 1);</span><br><span style="color: hsl(120, 100%, 40%);">+              int disable_eth;</span><br><span style="color: hsl(120, 100%, 40%);">+              get_option(&disable_eth, buffer);</span><br><span style="color: hsl(120, 100%, 40%);">+         if (disable_eth) {</span><br><span style="color: hsl(120, 100%, 40%);">+                    printk(BIOS_DEBUG, "Disabling ethernet adapter %d.\n",</span><br><span style="color: hsl(120, 100%, 40%);">+                              i + 1);</span><br><span style="color: hsl(120, 100%, 40%);">+                       dev = dev_find_slot(0, PCI_DEVFN(0x1c, i));</span><br><span style="color: hsl(120, 100%, 40%);">+                   dev->enabled = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+          }</span><br><span style="color: hsl(120, 100%, 40%);">+     }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /* mainboard_enable is executed as first thing after */</span><br><span> /* enumerate_buses(). */</span><br><span> </span><br><span>@@ -155,6 +176,7 @@</span><br><span> {</span><br><span>         install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 3);</span><br><span>      hwm_setup();</span><br><span style="color: hsl(120, 100%, 40%);">+  disable_ethernet();</span><br><span> }</span><br><span> </span><br><span> struct chip_operations mainboard_ops = {</span><br><span>diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c</span><br><span>index c356e5f..51a080a 100644</span><br><span>--- a/src/mainboard/kontron/986lcd-m/romstage.c</span><br><span>+++ b/src/mainboard/kontron/986lcd-m/romstage.c</span><br><span>@@ -183,8 +183,6 @@</span><br><span> </span><br><span> static void rcba_config(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-       u32 reg32;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span>   /* Set up virtual channel 0 */</span><br><span> </span><br><span>   /* Device 1f interrupt pin register */</span><br><span>@@ -202,26 +200,6 @@</span><br><span>        /* Enable IOAPIC */</span><br><span>  RCBA8(OIC) = 0x03;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-  /* Disable unused devices */</span><br><span style="color: hsl(0, 100%, 40%);">-    reg32 = 0;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-      if (read_option(ethernet1, 0) != 0) {</span><br><span style="color: hsl(0, 100%, 40%);">-           printk(BIOS_DEBUG, "Disabling ethernet adapter 1.\n");</span><br><span style="color: hsl(0, 100%, 40%);">-                reg32 |= FD_PCIE1;</span><br><span style="color: hsl(0, 100%, 40%);">-      }</span><br><span style="color: hsl(0, 100%, 40%);">-       if (read_option(ethernet2, 0) != 0) {</span><br><span style="color: hsl(0, 100%, 40%);">-           printk(BIOS_DEBUG, "Disabling ethernet adapter 2.\n");</span><br><span style="color: hsl(0, 100%, 40%);">-                reg32 |= FD_PCIE2;</span><br><span style="color: hsl(0, 100%, 40%);">-      }</span><br><span style="color: hsl(0, 100%, 40%);">-       if (read_option(ethernet3, 0) != 0) {</span><br><span style="color: hsl(0, 100%, 40%);">-           printk(BIOS_DEBUG, "Disabling ethernet adapter 3.\n");</span><br><span style="color: hsl(0, 100%, 40%);">-                reg32 |= FD_PCIE3;</span><br><span style="color: hsl(0, 100%, 40%);">-      }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-       reg32 |= 1;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-     RCBA32(FD) = reg32;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span>  /* Enable PCIe Root Port Clock Gate */</span><br><span> </span><br><span> }</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23663">change 23663</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23663"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ic8abc4c8289f5e34bbb7d5ee57d9a2f404e26189 </div>
<div style="display:none"> Gerrit-Change-Number: 23663 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>