<p>Julien Viard de Galbert has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23623">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/denverton_ns: Add UART Legacy mode with FSP traces<br><br>This option keeps the UART on the PCI interface so that FSP can output<br>its traces. It only hide it fron the PCI bus late so that Linux will<br>not reenumarate it but detects it as legacy (ttyS0 instead of ttyS4).<br><br>Change-Id: Id8801e178ffd8eeee78ece07da7bd6b8dbd88538<br>Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net><br>---<br>M src/soc/intel/denverton_ns/Kconfig<br>M src/soc/intel/denverton_ns/uart.c<br>2 files changed, 34 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/23623/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig</span><br><span>index 8d9a550..06a9c13 100644</span><br><span>--- a/src/soc/intel/denverton_ns/Kconfig</span><br><span>+++ b/src/soc/intel/denverton_ns/Kconfig</span><br><span>@@ -147,6 +147,11 @@</span><br><span> bool "Legacy Mode"</span><br><span> help</span><br><span> Enable legacy UART mode</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config LEGACY_UART_MODE_LATE_HIDE</span><br><span style="color: hsl(120, 100%, 40%);">+ bool "Legacy Mode - Late Hide"</span><br><span style="color: hsl(120, 100%, 40%);">+ help</span><br><span style="color: hsl(120, 100%, 40%);">+ Enable legacy UART mode but keep FSP traces</span><br><span> endchoice</span><br><span> </span><br><span> config ENABLE_HSUART</span><br><span>diff --git a/src/soc/intel/denverton_ns/uart.c b/src/soc/intel/denverton_ns/uart.c</span><br><span>index ca4e8b5..13c263b 100644</span><br><span>--- a/src/soc/intel/denverton_ns/uart.c</span><br><span>+++ b/src/soc/intel/denverton_ns/uart.c</span><br><span>@@ -26,11 +26,23 @@</span><br><span> #include <device/pci_ids.h></span><br><span> #include <soc/pci_devs.h></span><br><span> #include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <bootstate.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/uart.h></span><br><span> </span><br><span> static void dnv_ns_uart_read_resources(struct device *dev)</span><br><span> {</span><br><span> /* read resources to be visible in the log*/</span><br><span> pci_dev_read_resources(dev);</span><br><span style="color: hsl(120, 100%, 40%);">+#if IS_ENABLED(CONFIG_LEGACY_UART_MODE_LATE_HIDE)</span><br><span style="color: hsl(120, 100%, 40%);">+ struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0);</span><br><span style="color: hsl(120, 100%, 40%);">+ res->size = 0x8;</span><br><span style="color: hsl(120, 100%, 40%);">+ res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Do not configure membar */</span><br><span style="color: hsl(120, 100%, 40%);">+ res = find_resource(dev, PCI_BASE_ADDRESS_1);</span><br><span style="color: hsl(120, 100%, 40%);">+ res->flags = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ compact_resources(dev);</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> }</span><br><span> </span><br><span> static struct device_operations uart_ops = {</span><br><span>@@ -51,3 +63,20 @@</span><br><span> .vendor = PCI_VENDOR_ID_INTEL,</span><br><span> .devices = uart_ids</span><br><span> };</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#if IS_ENABLED(CONFIG_LEGACY_UART_MODE_LATE_HIDE)</span><br><span style="color: hsl(120, 100%, 40%);">+/* Hide HSUART PCI device very last when FSP no longer needs it */</span><br><span style="color: hsl(120, 100%, 40%);">+static void hide_hsuarts_cb(void *unused)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ int i;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t reg32;</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "HIDING HSUARTs.\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ for(i = DENVERTON_UARTS_TO_INI - 1; i >= 0; i--){</span><br><span style="color: hsl(120, 100%, 40%);">+ device_t uart_dev = dev_find_slot(0, PCI_DEVFN(HSUART_DEV, i));</span><br><span style="color: hsl(120, 100%, 40%);">+ reg32 = pci_read_config32(uart_dev, PCI_FUNC_RDCFG_HIDE)|1;</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config32(uart_dev, PCI_FUNC_RDCFG_HIDE, reg32);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, hide_hsuarts_cb, NULL);</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23623">change 23623</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Id8801e178ffd8eeee78ece07da7bd6b8dbd88538 </div>
<div style="display:none"> Gerrit-Change-Number: 23623 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Julien Viard de Galbert <jviarddegalbert@online.net> </div>