<p>Shelley Chen has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23576">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">google/fizz: Set Pmax value based on SKU id<br><br>BUG=b:71594855<br>BRANCH=None<br>TEST=Make sure correct pmax value is being passed into fsp<br><br>Change-Id: I47aa7f363781ae877e29bcebf9fae4d59b98027f<br>Signed-off-by: Shelley Chen <shchen@chromium.org><br>---<br>M src/mainboard/google/fizz/mainboard.c<br>M src/soc/intel/skylake/chip_fsp20.c<br>2 files changed, 10 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/23576/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/fizz/mainboard.c b/src/mainboard/google/fizz/mainboard.c</span><br><span>index e4d2199..0d97fd4 100644</span><br><span>--- a/src/mainboard/google/fizz/mainboard.c</span><br><span>+++ b/src/mainboard/google/fizz/mainboard.c</span><br><span>@@ -41,6 +41,8 @@</span><br><span> #define FIZZ_PSYSPL2_U42    90</span><br><span> #define FIZZ_MAX_TIME_WINDOW 6</span><br><span> #define FIZZ_MIN_DUTYCYCLE   4</span><br><span style="color: hsl(120, 100%, 40%);">+#define FIZZ_PMAX_U42       120</span><br><span style="color: hsl(120, 100%, 40%);">+#define FIZZ_PMAX_U22       91</span><br><span> /*</span><br><span>  * For type-C chargers, set PL2 to 90% of max power to account for</span><br><span>  * cable loss and FET Rdson loss in the path from the source.</span><br><span>@@ -137,7 +139,8 @@</span><br><span>  */</span><br><span> static void mainboard_set_power_limits(u32 *pl2_val, u32 *psyspl2_val,</span><br><span>                                 u32 *psyspl3_val, u32 *psyspl3_time_val,</span><br><span style="color: hsl(0, 100%, 40%);">-                                u32 *psyspl3_dutycycle_val, u32 *pl4_val)</span><br><span style="color: hsl(120, 100%, 40%);">+                                     u32 *psyspl3_dutycycle_val, u32 *pl4_val,</span><br><span style="color: hsl(120, 100%, 40%);">+                                     u16 *pmax_val)</span><br><span> {</span><br><span>   enum usb_chg_type type;</span><br><span>      u32 watts;</span><br><span>@@ -150,8 +153,11 @@</span><br><span> </span><br><span>        /* PL2 value is sku-based, no matter what charger we are using */</span><br><span>    pl2 = FIZZ_PL2_U22;</span><br><span style="color: hsl(0, 100%, 40%);">-     if ((1 << sku) & u42_mask)</span><br><span style="color: hsl(120, 100%, 40%);">+  *pmax_val = FIZZ_PMAX_U22;</span><br><span style="color: hsl(120, 100%, 40%);">+    if ((1 << sku) & u42_mask) {</span><br><span>               pl2 = FIZZ_PL2_U42;</span><br><span style="color: hsl(120, 100%, 40%);">+           *pmax_val = FIZZ_PMAX_U42;</span><br><span style="color: hsl(120, 100%, 40%);">+    }</span><br><span>    *psyspl3_val = *pl4_val = 0;</span><br><span> </span><br><span>     /* If we can't get charger info or not PD charger, assume barrel jack */</span><br><span>@@ -269,7 +275,7 @@</span><br><span>   mainboard_set_power_limits(&conf->tdp_pl2_override, &conf->tdp_psyspl2,</span><br><span>                                   &conf->tdp_psyspl3, &conf->tdp_psyspl3_time,</span><br><span>                                   &conf->tdp_psyspl3_dutycycle,</span><br><span style="color: hsl(0, 100%, 40%);">-                            &conf->tdp_pl4);</span><br><span style="color: hsl(120, 100%, 40%);">+                               &conf->tdp_pl4, &conf->psys_pmax);</span><br><span> </span><br><span>      set_bj_adapter_limit();</span><br><span> </span><br><span>diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c</span><br><span>index ce1ad4c..3660f43 100644</span><br><span>--- a/src/soc/intel/skylake/chip_fsp20.c</span><br><span>+++ b/src/soc/intel/skylake/chip_fsp20.c</span><br><span>@@ -108,6 +108,7 @@</span><br><span>       /* Set PsysPmax if it is available from DT */</span><br><span>        if (config->psys_pmax) {</span><br><span>          /* PsysPmax is in unit of 1/8 Watt */</span><br><span style="color: hsl(120, 100%, 40%);">+         printk(BIOS_DEBUG, "psys_pmax = %d\n", tconfig->PsysPmax);</span><br><span>              tconfig->PsysPmax = config->psys_pmax * 8;</span><br><span>     }</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23576">change 23576</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23576"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I47aa7f363781ae877e29bcebf9fae4d59b98027f </div>
<div style="display:none"> Gerrit-Change-Number: 23576 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Shelley Chen <shchen@google.com> </div>