<p>Matt DeVillier has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23568">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">google/lars: Add sdmode-delay property for max98357a<br><br>Adapted from Chromium commit:<br>af3ec09 [Lars: Add sdmode-delay device property for maxim98357a]<br><br>Add "sdmode-delay" as a device property for the maxim98357a codec.<br>This speaker amp requires both SFRM & BCLK to active and stable<br>before it is unmuted. If there is a BCLK and no SFRM,<br>that results in a pop noise.<br><br>Adding a configurable delay parameter for all Skylake platforms<br>to allow sufficient time for the BCLK & SFRM on I2S to be stable<br>before the amp unmutes itself to avoid a pop noise at the start of playback.<br>Setting the delay to 5ms since the observed delay between SFRM and unmuting<br>of the amp is around 2ms.<br><br>Adaptation needed to account for parameters having moved<br>from mainboard.asl to devicetree in upstream tree.<br><br>Original-Change-Id: I1fff4f86ff816e907553e7a6f1d05713f9d85084<br>Original-Signed-off-by: Rohit Ainapure <rohit.m.ainapure@intel.com><br>Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org><br><br>Change-Id: I8a1c52ccdb08df9a4ab293e12bb266309e08737b<br>Signed-off-by: Matt DeVillier <matt.devillier@gmail.com><br>---<br>M src/mainboard/google/lars/devicetree.cb<br>1 file changed, 1 insertion(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/23568/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/lars/devicetree.cb b/src/mainboard/google/lars/devicetree.cb</span><br><span>index 64f2a61..344d4b7 100644</span><br><span>--- a/src/mainboard/google/lars/devicetree.cb</span><br><span>+++ b/src/mainboard/google/lars/devicetree.cb</span><br><span>@@ -284,6 +284,7 @@</span><br><span>          device pci 1f.3 on</span><br><span>                   chip drivers/generic/max98357a</span><br><span>                               register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B2)"</span><br><span style="color: hsl(120, 100%, 40%);">+                           register "sdmode_delay" = "5"</span><br><span>                            device generic 0 on end</span><br><span>                      end</span><br><span>          end # Intel HDA</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23568">change 23568</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23568"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I8a1c52ccdb08df9a4ab293e12bb266309e08737b </div>
<div style="display:none"> Gerrit-Change-Number: 23568 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Matt DeVillier <matt.devillier@gmail.com> </div>