<p>Arthur Heymans <strong>uploaded patch set #2</strong> to this change.</p><p><a href="https://review.coreboot.org/23496">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">[WIP,NOTFORMERGE]nb/intel/i945: Use C_ENVIRONMENT_BOOTBLOCK<br><br>When the rom is cached in bootblock, ramstage currently fails to<br>run properly. If no mtrr covers the ROM it boots fine, but ofc<br>romstage will be terribly slow...<br><br>Change-Id: I4a301c47f058b119f692ee1cff2e43414281a861<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/cpu/intel/car/Makefile.inc<br>A src/cpu/intel/car/bootblock.c<br>M src/cpu/intel/car/cache_as_ram.S<br>M src/cpu/intel/car/romstage.c<br>M src/cpu/intel/car/teardown_car.S<br>M src/cpu/intel/common/Kconfig<br>M src/cpu/intel/common/Makefile.inc<br>A src/cpu/intel/common/util.c<br>A src/cpu/intel/common/util.h<br>M src/cpu/intel/socket_441/Kconfig<br>M src/mainboard/intel/d945gclf/Makefile.inc<br>A src/mainboard/intel/d945gclf/bootblock.c<br>M src/mainboard/intel/d945gclf/romstage.c<br>M src/northbridge/intel/i945/Kconfig<br>M src/northbridge/intel/i945/Makefile.inc<br>M src/northbridge/intel/i945/bootblock.c<br>M src/northbridge/intel/i945/ram_calc.c<br>M src/soc/intel/common/block/cpu/car/cache_as_ram.S<br>M src/superio/smsc/lpc47m15x/Makefile.inc<br>19 files changed, 426 insertions(+), 27 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/23496/2</pre><p>To view, visit <a href="https://review.coreboot.org/23496">change 23496</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23496"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newpatchset </div>
<div style="display:none"> Gerrit-Change-Id: I4a301c47f058b119f692ee1cff2e43414281a861 </div>
<div style="display:none"> Gerrit-Change-Number: 23496 </div>
<div style="display:none"> Gerrit-PatchSet: 2 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>