<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23490">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/intel/sandybridge: Always use the same MMCONF_BASE_ADDRESS<br><br>'Optimizing' MMCONF_BASE_ADDRESS for the native codepath prevents the<br>use of fallback/normal with both the native raminit and the mrc.bin.<br><br>This means that 128MB less is available to devices using the native<br>raminit. Most devices reserve 2048M for non memory resources below 4G,<br>which in most cases is more than adequate. Devices with only 1024M (and<br>that don't use the mrc.bin) are:<br>* lenovo/x220<br>* lenovo/x230<br>* lenovo/x131e<br>* lenovo/x1_carbon_gen1<br><br>Those could fail to allocate PCI resources, but on at least x220 with<br>a somewhat default configuration (USB3 expresscard, Wireless PCIe<br>card) still boots fine, so one should not expect much problem from<br>this change.<br><br>Change-Id: I1d0648fe36c88bd9279ac19e5c710055327599fd<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/northbridge/intel/sandybridge/Kconfig<br>1 file changed, 1 insertion(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/23490/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig</span><br><span>index 36cf940..fce1a49 100644</span><br><span>--- a/src/northbridge/intel/sandybridge/Kconfig</span><br><span>+++ b/src/northbridge/intel/sandybridge/Kconfig</span><br><span>@@ -94,11 +94,9 @@</span><br><span> </span><br><span> config MMCONF_BASE_ADDRESS</span><br><span>  hex</span><br><span style="color: hsl(0, 100%, 40%);">-     default 0xf8000000 if USE_NATIVE_RAMINIT</span><br><span>     default 0xf0000000</span><br><span>   help</span><br><span style="color: hsl(0, 100%, 40%);">-      We can optimize the native case but the MRC blob requires it</span><br><span style="color: hsl(0, 100%, 40%);">-    to be at 0xf0000000.</span><br><span style="color: hsl(120, 100%, 40%);">+          The MRC blob requires it to be at 0xf0000000.</span><br><span> </span><br><span> if USE_NATIVE_RAMINIT</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23490">change 23490</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23490"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I1d0648fe36c88bd9279ac19e5c710055327599fd </div>
<div style="display:none"> Gerrit-Change-Number: 23490 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>