<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23485">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/common/intel: Remove the mrc cache code<br><br>This is now unused, since all intel northbridges now use the<br>equivalent in drivers/mrc_cache.<br><br>Change-Id: I3e4b4afa53acc0a82b4ba961f13f816b04931fea<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>D src/northbridge/intel/common/Kconfig<br>D src/northbridge/intel/common/Makefile.inc<br>D src/northbridge/intel/common/mrc_cache.c<br>D src/northbridge/intel/common/mrc_cache.h<br>4 files changed, 0 insertions(+), 329 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/23485/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/intel/common/Kconfig b/src/northbridge/intel/common/Kconfig</span><br><span>deleted file mode 100644</span><br><span>index 80593d6..0000000</span><br><span>--- a/src/northbridge/intel/common/Kconfig</span><br><span>+++ /dev/null</span><br><span>@@ -1,2 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-config NORTHBRIDGE_INTEL_COMMON_MRC_CACHE</span><br><span style="color: hsl(0, 100%, 40%);">- def_bool n</span><br><span>diff --git a/src/northbridge/intel/common/Makefile.inc b/src/northbridge/intel/common/Makefile.inc</span><br><span>deleted file mode 100644</span><br><span>index 73427cb..0000000</span><br><span>--- a/src/northbridge/intel/common/Makefile.inc</span><br><span>+++ /dev/null</span><br><span>@@ -1,17 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-##</span><br><span style="color: hsl(0, 100%, 40%);">-## This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">-##</span><br><span style="color: hsl(0, 100%, 40%);">-## Copyright (C) 2016 Alexander Couzens <lynxis@fe80.eu></span><br><span style="color: hsl(0, 100%, 40%);">-##</span><br><span style="color: hsl(0, 100%, 40%);">-## This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">-## it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">-## the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">-##</span><br><span style="color: hsl(0, 100%, 40%);">-## This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">-## but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">-## GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">-##</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-romstage-$(CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE) += mrc_cache.c</span><br><span style="color: hsl(0, 100%, 40%);">-ramstage-$(CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE) += mrc_cache.c</span><br><span>diff --git a/src/northbridge/intel/common/mrc_cache.c b/src/northbridge/intel/common/mrc_cache.c</span><br><span>deleted file mode 100644</span><br><span>index f692282..0000000</span><br><span>--- a/src/northbridge/intel/common/mrc_cache.c</span><br><span>+++ /dev/null</span><br><span>@@ -1,290 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2012 Google Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#include <stdint.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <string.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <bootstate.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <console/console.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cbfs.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <fmap.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/acpi.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <ip_checksum.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <device/device.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cbmem.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <spi-generic.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <spi_flash.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include "mrc_cache.h"</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* convert a pointer to flash area into the offset inside the flash */</span><br><span style="color: hsl(0, 100%, 40%);">-static inline u32 to_flash_offset(struct spi_flash *flash, void *p) {</span><br><span style="color: hsl(0, 100%, 40%);">- return ((u32)p + flash->size);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static struct mrc_data_container *next_mrc_block(</span><br><span style="color: hsl(0, 100%, 40%);">- struct mrc_data_container *mrc_cache)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- /* MRC data blocks are aligned within the region */</span><br><span style="color: hsl(0, 100%, 40%);">- u32 mrc_size = sizeof(*mrc_cache) + mrc_cache->mrc_data_size;</span><br><span style="color: hsl(0, 100%, 40%);">- if (mrc_size & (MRC_DATA_ALIGN - 1UL)) {</span><br><span style="color: hsl(0, 100%, 40%);">- mrc_size &= ~(MRC_DATA_ALIGN - 1UL);</span><br><span style="color: hsl(0, 100%, 40%);">- mrc_size += MRC_DATA_ALIGN;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- u8 *region_ptr = (u8*)mrc_cache;</span><br><span style="color: hsl(0, 100%, 40%);">- region_ptr += mrc_size;</span><br><span style="color: hsl(0, 100%, 40%);">- return (struct mrc_data_container *)region_ptr;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static int is_mrc_cache(struct mrc_data_container *mrc_cache)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- return (!!mrc_cache) && (mrc_cache->mrc_signature == MRC_DATA_SIGNATURE);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* Right now, the offsets for the MRC cache area are hard-coded in the</span><br><span style="color: hsl(0, 100%, 40%);">- * northbridge Kconfig if CONFIG_CHROMEOS is not set. In order to make</span><br><span style="color: hsl(0, 100%, 40%);">- * this more flexible, there are two of options:</span><br><span style="color: hsl(0, 100%, 40%);">- * - Have each mainboard Kconfig supply a hard-coded offset</span><br><span style="color: hsl(0, 100%, 40%);">- * - Use CBFS</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-static u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- size_t region_size = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- *mrc_region_ptr = NULL;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_CHROMEOS)) {</span><br><span style="color: hsl(0, 100%, 40%);">- struct region_device rdev;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (fmap_locate_area_as_rdev("RW_MRC_CACHE", &rdev) == 0) {</span><br><span style="color: hsl(0, 100%, 40%);">- region_size = region_device_sz(&rdev);</span><br><span style="color: hsl(0, 100%, 40%);">- *mrc_region_ptr = rdev_mmap_full(&rdev);</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- } else {</span><br><span style="color: hsl(0, 100%, 40%);">- *mrc_region_ptr = cbfs_boot_map_with_leak("mrc.cache",</span><br><span style="color: hsl(0, 100%, 40%);">- CBFS_TYPE_MRC_CACHE,</span><br><span style="color: hsl(0, 100%, 40%);">- ®ion_size);</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- return region_size;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * Find the largest index block in the MRC cache. Return NULL if non is</span><br><span style="color: hsl(0, 100%, 40%);">- * found.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-static struct mrc_data_container *find_current_mrc_cache_local</span><br><span style="color: hsl(0, 100%, 40%);">- (struct mrc_data_container *mrc_cache, u32 region_size)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- u32 region_end;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 entry_id = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- struct mrc_data_container *mrc_next = mrc_cache;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- region_end = (u32) mrc_cache + region_size;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Search for the last filled entry in the region */</span><br><span style="color: hsl(0, 100%, 40%);">- while (is_mrc_cache(mrc_next)) {</span><br><span style="color: hsl(0, 100%, 40%);">- entry_id++;</span><br><span style="color: hsl(0, 100%, 40%);">- mrc_cache = mrc_next;</span><br><span style="color: hsl(0, 100%, 40%);">- mrc_next = next_mrc_block(mrc_next);</span><br><span style="color: hsl(0, 100%, 40%);">- if ((u32)mrc_next >= region_end) {</span><br><span style="color: hsl(0, 100%, 40%);">- /* Stay in the MRC data region */</span><br><span style="color: hsl(0, 100%, 40%);">- break;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (entry_id == 0) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_ERR, "%s: No valid MRC cache found.\n", __func__);</span><br><span style="color: hsl(0, 100%, 40%);">- return NULL;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Verify checksum */</span><br><span style="color: hsl(0, 100%, 40%);">- if (mrc_cache->mrc_checksum !=</span><br><span style="color: hsl(0, 100%, 40%);">- compute_ip_checksum(mrc_cache->mrc_data,</span><br><span style="color: hsl(0, 100%, 40%);">- mrc_cache->mrc_data_size)) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_ERR, "%s: MRC cache checksum mismatch\n", __func__);</span><br><span style="color: hsl(0, 100%, 40%);">- return NULL;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "%s: picked entry %u from cache block\n", __func__,</span><br><span style="color: hsl(0, 100%, 40%);">- entry_id - 1);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return mrc_cache;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* SPI code needs malloc/free.</span><br><span style="color: hsl(0, 100%, 40%);">- * Also unknown if writing flash from XIP-flash code is a good idea</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* find the first empty block in the MRC cache area.</span><br><span style="color: hsl(0, 100%, 40%);">- * If there's none, return NULL.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * @mrc_cache_base - base address of the MRC cache area</span><br><span style="color: hsl(0, 100%, 40%);">- * @mrc_cache - current entry (for which we need to find next)</span><br><span style="color: hsl(0, 100%, 40%);">- * @region_size - total size of the MRC cache area</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-static struct mrc_data_container *find_next_mrc_cache</span><br><span style="color: hsl(0, 100%, 40%);">- (struct mrc_data_container *mrc_cache_base,</span><br><span style="color: hsl(0, 100%, 40%);">- struct mrc_data_container *mrc_cache,</span><br><span style="color: hsl(0, 100%, 40%);">- u32 region_size)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- u32 region_end = (u32) mrc_cache_base + region_size;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- mrc_cache = next_mrc_block(mrc_cache);</span><br><span style="color: hsl(0, 100%, 40%);">- if ((u32)mrc_cache >= region_end) {</span><br><span style="color: hsl(0, 100%, 40%);">- /* Crossed the boundary */</span><br><span style="color: hsl(0, 100%, 40%);">- mrc_cache = NULL;</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "%s: no available entries found\n",</span><br><span style="color: hsl(0, 100%, 40%);">- __func__);</span><br><span style="color: hsl(0, 100%, 40%);">- } else {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG,</span><br><span style="color: hsl(0, 100%, 40%);">- "%s: picked next entry from cache block at %p\n",</span><br><span style="color: hsl(0, 100%, 40%);">- __func__, mrc_cache);</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return mrc_cache;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static void update_mrc_cache(void *unused)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "Updating MRC cache data.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- struct mrc_data_container *current = cbmem_find(CBMEM_ID_MRCDATA);</span><br><span style="color: hsl(0, 100%, 40%);">- struct mrc_data_container *cache, *cache_base;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 cache_size;</span><br><span style="color: hsl(0, 100%, 40%);">- int ret;</span><br><span style="color: hsl(0, 100%, 40%);">- struct spi_flash flash;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (acpi_is_wakeup_s3())</span><br><span style="color: hsl(0, 100%, 40%);">- return;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (!current) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_ERR, "No MRC cache in cbmem. Can't update flash.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- return;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- if (current->mrc_data_size == -1) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_ERR, "MRC cache data in cbmem invalid.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- return;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- cache_size = get_mrc_cache_region(&cache_base);</span><br><span style="color: hsl(0, 100%, 40%);">- if (cache_base == NULL) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_ERR, "%s: could not find MRC cache area\n",</span><br><span style="color: hsl(0, 100%, 40%);">- __func__);</span><br><span style="color: hsl(0, 100%, 40%);">- return;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /*</span><br><span style="color: hsl(0, 100%, 40%);">- * we need to:</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">- // 0. compare MRC data to last mrc-cache block (exit if same)</span><br><span style="color: hsl(0, 100%, 40%);">- cache = find_current_mrc_cache_local(cache_base, cache_size);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (cache && (cache->mrc_data_size == current->mrc_data_size) &&</span><br><span style="color: hsl(0, 100%, 40%);">- (memcmp(cache, current, cache->mrc_data_size) == 0)) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG,</span><br><span style="color: hsl(0, 100%, 40%);">- "MRC data in flash is up to date. No update.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- return;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- // 1. use spi_flash_probe() to find the flash, then</span><br><span style="color: hsl(0, 100%, 40%);">- spi_init();</span><br><span style="color: hsl(0, 100%, 40%);">- if (spi_flash_probe(0, 0, &flash)) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "Could not find SPI device\n");</span><br><span style="color: hsl(0, 100%, 40%);">- return;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- // 2. look up the first unused block</span><br><span style="color: hsl(0, 100%, 40%);">- if (cache)</span><br><span style="color: hsl(0, 100%, 40%);">- cache = find_next_mrc_cache(cache_base, cache, cache_size);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /*</span><br><span style="color: hsl(0, 100%, 40%);">- * 3. if no such place exists, erase entire mrc-cache range & use</span><br><span style="color: hsl(0, 100%, 40%);">- * block 0. First time around the erase is not needed, but this is a</span><br><span style="color: hsl(0, 100%, 40%);">- * small overhead for simpler code.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">- if (!cache) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG,</span><br><span style="color: hsl(0, 100%, 40%);">- "Need to erase the MRC cache region of %d bytes at %p\n",</span><br><span style="color: hsl(0, 100%, 40%);">- cache_size, cache_base);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- spi_flash_erase(&flash, to_flash_offset(&flash, cache_base),</span><br><span style="color: hsl(0, 100%, 40%);">- cache_size);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* we will start at the beginning again */</span><br><span style="color: hsl(0, 100%, 40%);">- cache = cache_base;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">- // 4. write mrc data with flash->write()</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "Finally: write MRC cache update to flash at %p\n",</span><br><span style="color: hsl(0, 100%, 40%);">- cache);</span><br><span style="color: hsl(0, 100%, 40%);">- ret = spi_flash_write(&flash, to_flash_offset(&flash, cache),</span><br><span style="color: hsl(0, 100%, 40%);">- current->mrc_data_size + sizeof(*current), current);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (ret)</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_WARNING, "Writing the MRC cache failed with ret %d\n",</span><br><span style="color: hsl(0, 100%, 40%);">- ret);</span><br><span style="color: hsl(0, 100%, 40%);">- else</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "Successfully wrote MRC cache\n");</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* Do it before chipset is locked during BS_POST_DEVICE. */</span><br><span style="color: hsl(0, 100%, 40%);">-BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, update_mrc_cache, NULL);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-struct mrc_data_container *find_current_mrc_cache(void)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- struct mrc_data_container *cache_base;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 cache_size;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- cache_size = get_mrc_cache_region(&cache_base);</span><br><span style="color: hsl(0, 100%, 40%);">- if (cache_base == NULL) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_ERR, "%s: could not find MRC cache area\n",</span><br><span style="color: hsl(0, 100%, 40%);">- __func__);</span><br><span style="color: hsl(0, 100%, 40%);">- return NULL;</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /*</span><br><span style="color: hsl(0, 100%, 40%);">- * we need to:</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">- // 0. compare MRC data to last mrc-cache block (exit if same)</span><br><span style="color: hsl(0, 100%, 40%);">- return find_current_mrc_cache_local(cache_base, cache_size);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-struct mrc_data_container *</span><br><span style="color: hsl(0, 100%, 40%);">-store_current_mrc_cache(void *data, unsigned length)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- struct mrc_data_container *mrcdata;</span><br><span style="color: hsl(0, 100%, 40%);">- int output_len = ALIGN(length, 16);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Save the MRC S3 restore data to cbmem */</span><br><span style="color: hsl(0, 100%, 40%);">- mrcdata = cbmem_add</span><br><span style="color: hsl(0, 100%, 40%);">- (CBMEM_ID_MRCDATA,</span><br><span style="color: hsl(0, 100%, 40%);">- output_len + sizeof(struct mrc_data_container));</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (!mrcdata)</span><br><span style="color: hsl(0, 100%, 40%);">- return NULL;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_DEBUG, "Relocate MRC DATA from %p to %p (%u bytes)\n",</span><br><span style="color: hsl(0, 100%, 40%);">- data, mrcdata, output_len);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- mrcdata->mrc_signature = MRC_DATA_SIGNATURE;</span><br><span style="color: hsl(0, 100%, 40%);">- mrcdata->mrc_data_size = output_len;</span><br><span style="color: hsl(0, 100%, 40%);">- mrcdata->reserved = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- memcpy(mrcdata->mrc_data, data, length);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Zero the unused space in aligned buffer. */</span><br><span style="color: hsl(0, 100%, 40%);">- if (output_len > length)</span><br><span style="color: hsl(0, 100%, 40%);">- memset(mrcdata->mrc_data+length, 0, output_len - length);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- mrcdata->mrc_checksum = compute_ip_checksum(mrcdata->mrc_data,</span><br><span style="color: hsl(0, 100%, 40%);">- mrcdata->mrc_data_size);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return mrcdata;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/northbridge/intel/common/mrc_cache.h b/src/northbridge/intel/common/mrc_cache.h</span><br><span>deleted file mode 100644</span><br><span>index 6f0dd6e..0000000</span><br><span>--- a/src/northbridge/intel/common/mrc_cache.h</span><br><span>+++ /dev/null</span><br><span>@@ -1,20 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef NORTHBRIDGE_INTEL_COMMON_MRC_CACHE_H</span><br><span style="color: hsl(0, 100%, 40%);">-#define NORTHBRIDGE_INTEL_COMMON_MRC_CACHE_H</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#include <compiler.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#define MRC_DATA_ALIGN 0x1000</span><br><span style="color: hsl(0, 100%, 40%);">-#define MRC_DATA_SIGNATURE (('M'<<0)|('R'<<8)|('C'<<16)|('D'<<24))</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-struct mrc_data_container {</span><br><span style="color: hsl(0, 100%, 40%);">- u32 mrc_signature; // "MRCD"</span><br><span style="color: hsl(0, 100%, 40%);">- u32 mrc_data_size; // Actual total size of this structure</span><br><span style="color: hsl(0, 100%, 40%);">- u32 mrc_checksum; // IP style checksum</span><br><span style="color: hsl(0, 100%, 40%);">- u32 reserved; // For header alignment</span><br><span style="color: hsl(0, 100%, 40%);">- u8 mrc_data[0]; // Variable size, platform/run time dependent.</span><br><span style="color: hsl(0, 100%, 40%);">-} __packed;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-struct mrc_data_container *find_current_mrc_cache(void);</span><br><span style="color: hsl(0, 100%, 40%);">-struct mrc_data_container *store_current_mrc_cache(void *data, unsigned length);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#endif /* NORTHBRIDGE_INTEL_COMMON_MRC_CACHE_H */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23485">change 23485</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23485"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I3e4b4afa53acc0a82b4ba961f13f816b04931fea </div>
<div style="display:none"> Gerrit-Change-Number: 23485 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>