<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23345">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">device/dram/ddr2.c: Add methods to compute to identify dram<br><br>DDR2 DIMMs are uniquely defined by SPD byte 64 till 72 and 93 till<br>98. Compute a crc16 over that data to provide a solid way to check<br>DIMM identify.<br><br>Change-Id: I3c0c42786197f9b4eb3e42261c10ff5e4266120f<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/device/dram/ddr2.c<br>M src/include/device/dram/ddr2.h<br>2 files changed, 44 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/23345/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/device/dram/ddr2.c b/src/device/dram/ddr2.c</span><br><span>index 0117b93..a4775d3 100644</span><br><span>--- a/src/device/dram/ddr2.c</span><br><span>+++ b/src/device/dram/ddr2.c</span><br><span>@@ -71,6 +71,49 @@</span><br><span> return c;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static u16 crc16(const u8 *ptr, int n_crc)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ int i;</span><br><span style="color: hsl(120, 100%, 40%);">+ u16 crc = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ while (--n_crc >= 0) {</span><br><span style="color: hsl(120, 100%, 40%);">+ crc = crc ^ ((int)*ptr++ << 8);</span><br><span style="color: hsl(120, 100%, 40%);">+ for (i = 0; i < 8; ++i) {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (crc & 0x8000)</span><br><span style="color: hsl(120, 100%, 40%);">+ crc = (crc << 1) ^ 0x1021;</span><br><span style="color: hsl(120, 100%, 40%);">+ else</span><br><span style="color: hsl(120, 100%, 40%);">+ crc = crc << 1;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return crc;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/**</span><br><span style="color: hsl(120, 100%, 40%);">+ * \brief Calculate the CRC of a DDR2 SPD unique identifier</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * @param spd pointer to raw SPD data</span><br><span style="color: hsl(120, 100%, 40%);">+ * @param len length of data in SPD</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * @return the CRC of SPD data bytes 64..72 and 93..98, or 0</span><br><span style="color: hsl(120, 100%, 40%);">+ * when spd data is truncated.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+u16 spd_ddr2_calc_unique_crc(u8 *spd, int len)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ u8 id_bytes[15];</span><br><span style="color: hsl(120, 100%, 40%);">+ int i, j = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ if (len < 98)</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Not enough bytes available to get the CRC */</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ for (i = 64; i <= 72; i++)</span><br><span style="color: hsl(120, 100%, 40%);">+ id_bytes[j++] = spd[i];</span><br><span style="color: hsl(120, 100%, 40%);">+ for (i = 93; i <= 98; i++)</span><br><span style="color: hsl(120, 100%, 40%);">+ id_bytes[j++] = spd[i];</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return crc16(id_bytes, 15);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /**</span><br><span> * \brief Return size of SPD.</span><br><span> *</span><br><span>diff --git a/src/include/device/dram/ddr2.h b/src/include/device/dram/ddr2.h</span><br><span>index 7322b12..1566276 100644</span><br><span>--- a/src/include/device/dram/ddr2.h</span><br><span>+++ b/src/include/device/dram/ddr2.h</span><br><span>@@ -218,5 +218,6 @@</span><br><span> void dram_print_spd_ddr2(const struct dimm_attr_st *dimm);</span><br><span> void normalize_tck(u32 *tclk);</span><br><span> u8 spd_get_msbs(u8 c);</span><br><span style="color: hsl(120, 100%, 40%);">+u16 spd_ddr2_calc_unique_crc(u8 *spd, int len);</span><br><span> </span><br><span> #endif /* DEVICE_DRAM_DDR2L_H */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23345">change 23345</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23345"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I3c0c42786197f9b4eb3e42261c10ff5e4266120f </div>
<div style="display:none"> Gerrit-Change-Number: 23345 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>