<p>Bora Guvendik has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/23179">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">src/soc/intel/skylake: Add gpio groups<br><br>Add the information about groups within each community.<br><br>Change-Id: If69373a70277f9f9d62763a6c852161e2a2f48f3<br>Signed-off-by: Bora Guvendik <bora.guvendik@intel.com><br>---<br>M src/soc/intel/skylake/gpio.c<br>1 file changed, 46 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/23179/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/skylake/gpio.c b/src/soc/intel/skylake/gpio.c</span><br><span>index 9c9d041..99ccf6d 100644</span><br><span>--- a/src/soc/intel/skylake/gpio.c</span><br><span>+++ b/src/soc/intel/skylake/gpio.c</span><br><span>@@ -20,6 +20,12 @@</span><br><span> #include <soc/pcr_ids.h></span><br><span> #include <soc/pm.h></span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#define SKL_GPP(s, e) \</span><br><span style="color: hsl(120, 100%, 40%);">+ { \</span><br><span style="color: hsl(120, 100%, 40%);">+ .first_pad = (s), \</span><br><span style="color: hsl(120, 100%, 40%);">+ .size = ((e) - (s) + 1), \</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> static const struct reset_mapping rst_map[] = {</span><br><span> { .logical = PAD_CFG0_LOGICAL_RESET_RSMRST, .chipset = 0U << 30},</span><br><span> { .logical = PAD_CFG0_LOGICAL_RESET_DEEP, .chipset = 1U << 30},</span><br><span>@@ -33,6 +39,38 @@</span><br><span> { .logical = PAD_CFG0_LOGICAL_RESET_RSMRST, .chipset = 3U << 30},</span><br><span> };</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+static const struct pad_group skl_community_com0_groups[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ SKL_GPP(GPP_A0, GPP_A23), /* GPP A */</span><br><span style="color: hsl(120, 100%, 40%);">+ SKL_GPP(GPP_B0, GPP_B23), /* GPP B */</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static const struct pad_group skl_community_com1_groups[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ SKL_GPP(GPP_C0, GPP_C23), /* GPP C */</span><br><span style="color: hsl(120, 100%, 40%);">+#if IS_ENABLED(CONFIG_SKYLAKE_SOC_PCH_H)</span><br><span style="color: hsl(120, 100%, 40%);">+ SKL_GPP(GPP_D0, GPP_D23), /* GPP D */</span><br><span style="color: hsl(120, 100%, 40%);">+ SKL_GPP(GPP_E0, GPP_E12), /* GPP E */</span><br><span style="color: hsl(120, 100%, 40%);">+ SKL_GPP(GPP_F0, GPP_F23), /* GPP F */</span><br><span style="color: hsl(120, 100%, 40%);">+ SKL_GPP(GPP_G0, GPP_G23), /* GPP G */</span><br><span style="color: hsl(120, 100%, 40%);">+ SKL_GPP(GPP_H0, GPP_H23), /* GPP H */</span><br><span style="color: hsl(120, 100%, 40%);">+#else</span><br><span style="color: hsl(120, 100%, 40%);">+ SKL_GPP(GPP_D0, GPP_D23), /* GPP D */</span><br><span style="color: hsl(120, 100%, 40%);">+ SKL_GPP(GPP_E0, GPP_E23), /* GPP E */</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static const struct pad_group skl_community_com3_groups[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+#if IS_ENABLED(CONFIG_SKYLAKE_SOC_PCH_H)</span><br><span style="color: hsl(120, 100%, 40%);">+ SKL_GPP(GPP_I0, GPP_I10), /* GPP I */</span><br><span style="color: hsl(120, 100%, 40%);">+#else</span><br><span style="color: hsl(120, 100%, 40%);">+ SKL_GPP(GPP_F0, GPP_F23), /* GPP F */</span><br><span style="color: hsl(120, 100%, 40%);">+ SKL_GPP(GPP_G0, GPP_G7), /* GPP G */</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static const struct pad_group skl_community_com2_groups[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ SKL_GPP(GPD0, GPD11), /* GPP GDP */</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> static const struct pad_community skl_gpio_communities[] = {</span><br><span> {</span><br><span> .port = PID_GPIOCOM0,</span><br><span>@@ -48,6 +86,8 @@</span><br><span> .acpi_path = "\\_SB.PCI0.GPIO",</span><br><span> .reset_map = rst_map,</span><br><span> .num_reset_vals = ARRAY_SIZE(rst_map),</span><br><span style="color: hsl(120, 100%, 40%);">+ .groups = skl_community_com0_groups,</span><br><span style="color: hsl(120, 100%, 40%);">+ .num_groups = ARRAY_SIZE(skl_community_com0_groups),</span><br><span> }, {</span><br><span> .port = PID_GPIOCOM1,</span><br><span> .first_pad = GPP_C0,</span><br><span>@@ -66,6 +106,8 @@</span><br><span> .acpi_path = "\\_SB.PCI0.GPIO",</span><br><span> .reset_map = rst_map,</span><br><span> .num_reset_vals = ARRAY_SIZE(rst_map),</span><br><span style="color: hsl(120, 100%, 40%);">+ .groups = skl_community_com1_groups,</span><br><span style="color: hsl(120, 100%, 40%);">+ .num_groups = ARRAY_SIZE(skl_community_com1_groups),</span><br><span> }, {</span><br><span> .port = PID_GPIOCOM3,</span><br><span> #if IS_ENABLED(CONFIG_SKYLAKE_SOC_PCH_H)</span><br><span>@@ -85,6 +127,8 @@</span><br><span> .acpi_path = "\\_SB.PCI0.GPIO",</span><br><span> .reset_map = rst_map,</span><br><span> .num_reset_vals = ARRAY_SIZE(rst_map),</span><br><span style="color: hsl(120, 100%, 40%);">+ .groups = skl_community_com3_groups,</span><br><span style="color: hsl(120, 100%, 40%);">+ .num_groups = ARRAY_SIZE(skl_community_com3_groups),</span><br><span> }, {</span><br><span> .port = PID_GPIOCOM2,</span><br><span> .first_pad = GPD0,</span><br><span>@@ -99,6 +143,8 @@</span><br><span> .acpi_path = "\\_SB.PCI0.GPIO",</span><br><span> .reset_map = rst_map_com2,</span><br><span> .num_reset_vals = ARRAY_SIZE(rst_map_com2),</span><br><span style="color: hsl(120, 100%, 40%);">+ .groups = skl_community_com2_groups,</span><br><span style="color: hsl(120, 100%, 40%);">+ .num_groups = ARRAY_SIZE(skl_community_com2_groups),</span><br><span> }</span><br><span> };</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23179">change 23179</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: If69373a70277f9f9d62763a6c852161e2a2f48f3 </div>
<div style="display:none"> Gerrit-Change-Number: 23179 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Bora Guvendik <bora.guvendik@intel.com> </div>