<p>Nick Vaccaro would like Nick Vaccaro to <strong>review</strong> this change.</p><p><a href="https://review.coreboot.org/23035">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mainboard/google/zoombini: Add SoC acpi files to dsdt.asl<br><br>BUG=b:64395641<br>BRANCH=None<br>TEST=Verify "./util/abuild/abuild -p none -t google/zoombini -x -a"<br>compiles successfully.<br><br>Change-Id: I417a1c606e4968120414af57aa3b17d5c3b3cad0<br>Signed-off-by: Nick Vaccaro <nvaccaro@chromium.org><br>---<br>M src/mainboard/google/zoombini/dsdt.asl<br>1 file changed, 11 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/23035/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/zoombini/dsdt.asl b/src/mainboard/google/zoombini/dsdt.asl</span><br><span>index b1faad6..c50a79a 100644</span><br><span>--- a/src/mainboard/google/zoombini/dsdt.asl</span><br><span>+++ b/src/mainboard/google/zoombini/dsdt.asl</span><br><span>@@ -24,14 +24,25 @@</span><br><span> 0x20110725 // OEM revision</span><br><span> )</span><br><span> {</span><br><span style="color: hsl(120, 100%, 40%);">+ // Some generic macros</span><br><span style="color: hsl(120, 100%, 40%);">+ #include <soc/intel/cannonlake/acpi/platform.asl></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> // global NVS and variables</span><br><span> #include <soc/intel/cannonlake/acpi/globalnvs.asl></span><br><span> </span><br><span> Scope (\_SB) {</span><br><span style="color: hsl(120, 100%, 40%);">+ Device (PCI0)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ #include <soc/intel/cannonlake/acpi/northbridge.asl></span><br><span style="color: hsl(120, 100%, 40%);">+ #include <soc/intel/cannonlake/acpi/southbridge.asl></span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> }</span><br><span> </span><br><span> #if IS_ENABLED(CONFIG_CHROMEOS)</span><br><span> // Chrome OS specific</span><br><span> #include <vendorcode/google/chromeos/acpi/chromeos.asl></span><br><span> #endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ // Chipset specific sleep states</span><br><span style="color: hsl(120, 100%, 40%);">+ #include <soc/intel/cannonlake/acpi/sleepstates.asl></span><br><span> }</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/23035">change 23035</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/23035"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I417a1c606e4968120414af57aa3b17d5c3b3cad0 </div>
<div style="display:none"> Gerrit-Change-Number: 23035 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Nick Vaccaro <nvaccaro@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Nick Vaccaro <nvaccaro@chromium.org> </div>