<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22981">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tables<br><br>Both southbridges need to be done at once since this southbridge code<br>is used for different northbridges, which fails to compile when done<br>separately.<br><br>This needs an acpi_name functions in the northbridge code to be defined.<br><br>Change-Id: I286d251ddf8fcae27dd07011a1cd62d8f4847683<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>D src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl<br>D src/mainboard/asrock/g41c-gs/acpi/x4x_pci_irqs.asl<br>D src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl<br>D src/mainboard/foxconn/g41s-k/acpi/x4x_pci_irqs.asl<br>D src/mainboard/getac/p470/acpi/i945_pci_irqs.asl<br>D src/mainboard/gigabyte/ga-945gcm-s2l/acpi/i945_pci_irqs.asl<br>D src/mainboard/gigabyte/ga-g41m-es2l/acpi/x4x_pci_irqs.asl<br>D src/mainboard/ibase/mb899/acpi/i945_pci_irqs.asl<br>D src/mainboard/intel/d510mo/acpi/pineview_pci_irqs.asl<br>D src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl<br>D src/mainboard/intel/dg43gt/acpi/x4x_pci_irqs.asl<br>D src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl<br>D src/mainboard/lenovo/t60/acpi/i945_pci_irqs.asl<br>D src/mainboard/lenovo/x60/acpi/i945_pci_irqs.asl<br>D src/mainboard/lenovo/z61t/acpi/i945_pci_irqs.asl<br>D src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl<br>M src/northbridge/intel/i945/acpi/hostbridge.asl<br>M src/northbridge/intel/i945/northbridge.c<br>M src/northbridge/intel/pineview/acpi/hostbridge.asl<br>M src/northbridge/intel/pineview/northbridge.c<br>M src/northbridge/intel/x4x/acpi/hostbridge.asl<br>M src/northbridge/intel/x4x/northbridge.c<br>M src/southbridge/intel/i82801gx/Kconfig<br>M src/southbridge/intel/i82801gx/i82801gx.h<br>M src/southbridge/intel/i82801gx/lpc.c<br>M src/southbridge/intel/i82801jx/Kconfig<br>M src/southbridge/intel/i82801jx/i82801jx.h<br>M src/southbridge/intel/i82801jx/lpc.c<br>28 files changed, 93 insertions(+), 1,191 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/22981/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl b/src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl</span><br><span>deleted file mode 100644</span><br><span>index 5e5facb..0000000</span><br><span>--- a/src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,66 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org></span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(0, 100%, 40%);">- * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(0, 100%, 40%);">- * published by the Free Software Foundation; version 2 of</span><br><span style="color: hsl(0, 100%, 40%);">- * the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* This is board specific information: IRQ routing for the</span><br><span style="color: hsl(0, 100%, 40%);">- * i945</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-// PCI Interrupt Routing</span><br><span style="color: hsl(0, 100%, 40%);">-Method(_PRT)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- If (PICM) {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001FFFF, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002FFFF, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0007FFFF, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001BFFFF, 0, 0, 0x16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001CFFFF, 0, 0, 0x11 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001CFFFF, 1, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001CFFFF, 2, 0, 0x12 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001CFFFF, 3, 0, 0x13 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001DFFFF, 0, 0, 0x15 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001DFFFF, 1, 0, 0x13 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001DFFFF, 2, 0, 0x12 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001DFFFF, 3, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001EFFFF, 0, 0, 0x16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001EFFFF, 1, 0, 0x14 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001FFFFF, 0, 0, 0x12 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001FFFFF, 1, 0, 0x13 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001FFFFF, 3, 0, 0x10 }</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- } Else {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001FFFF, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002FFFF, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0007FFFF, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001BFFFF, 0, \_SB.PCI0.LPCB.LNKG, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001CFFFF, 0, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001CFFFF, 1, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001CFFFF, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001CFFFF, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001DFFFF, 0, \_SB.PCI0.LPCB.LNKH, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001DFFFF, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001DFFFF, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001DFFFF, 3, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001EFFFF, 0, \_SB.PCI0.LPCB.LNKG, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001EFFFF, 1, \_SB.PCI0.LPCB.LNKE, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001FFFFF, 0, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001FFFFF, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001FFFFF, 3, \_SB.PCI0.LPCB.LNKA, 0 }</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/mainboard/asrock/g41c-gs/acpi/x4x_pci_irqs.asl b/src/mainboard/asrock/g41c-gs/acpi/x4x_pci_irqs.asl</span><br><span>deleted file mode 100644</span><br><span>index 5bec150..0000000</span><br><span>--- a/src/mainboard/asrock/g41c-gs/acpi/x4x_pci_irqs.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,66 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz></span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* This is board specific information: IRQ routing for x4x */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* PCI Interrupt Routing */</span><br><span style="color: hsl(0, 100%, 40%);">-Method(_PRT)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- If (PICM) {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- /* PEG */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* Internal GFX */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* High Definition Audio 0:1b.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PCIe Root Ports 0:1c.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, 0, 0x11 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, 0, 0x12 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, 0, 0x13 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* USB and EHCI 0:1d.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, 0, 0x17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, 0, 0x13 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, 0, 0x12 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PATA/SATA/SMBUS 0:1f.1-3 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, 0, 0x12 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 0x13 },</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- } Else {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- /* PEG */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* Internal GFX */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* High Definition Audio 0:1b.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PCIe Root Ports 0:1c.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* USB and EHCI 0:1d.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PATA/SATA/SMBUS 0:1f.1-3 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl b/src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl</span><br><span>deleted file mode 100644</span><br><span>index 4aaa33f..0000000</span><br><span>--- a/src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,75 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2007-2009 coresystems GmbH</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(0, 100%, 40%);">- * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(0, 100%, 40%);">- * published by the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* This is board specific information: IRQ routing for the</span><br><span style="color: hsl(0, 100%, 40%);">- * i945</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-// PCI Interrupt Routing</span><br><span style="color: hsl(0, 100%, 40%);">-Method(_PRT)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- If (PICM) {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Graphics 0:1.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // Onboard graphics (IGD) 0:2.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // High Definition Audio 0:1b.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Root Ports 0:1c.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- // USB and EHCI 0:1d.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- // LPC device 0:1f.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 3, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- } Else {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Graphics 0:1.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // Onboard graphics (IGD) 0:2.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // High Definition Audio 0:1b.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Root Ports 0:1c.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // USB and EHCI 0:1d.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // LPC device 0:1f.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/mainboard/foxconn/g41s-k/acpi/x4x_pci_irqs.asl b/src/mainboard/foxconn/g41s-k/acpi/x4x_pci_irqs.asl</span><br><span>deleted file mode 100644</span><br><span>index 8c8afcb..0000000</span><br><span>--- a/src/mainboard/foxconn/g41s-k/acpi/x4x_pci_irqs.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,79 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz></span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2017 Samuel Holland <samuel@sholland.org></span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* This is board specific information: IRQ routing for x4x */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* PCI Interrupt Routing */</span><br><span style="color: hsl(0, 100%, 40%);">-Method(_PRT)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- If (PICM) {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- /* PEG 0:01.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 1, 0, 0x11 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 2, 0, 0x12 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 3, 0, 0x13 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* Internal GFX 0:02.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* High Definition Audio 0:1b.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PCIe Root Ports 0:1c.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, 0, 0x11 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, 0, 0x12 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, 0, 0x13 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* USB and EHCI 0:1d.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, 0, 0x17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, 0, 0x13 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, 0, 0x12 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PCI Bridge 0x1e.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 0, 0, 0x11 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 1, 0, 0x14 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PATA/SATA/SMBUS 0:1f.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, 0, 0x12 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 0x13 },</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- } Else {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- /* PEG 0:01.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* Internal GFX 0:02.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* High Definition Audio 0:1b.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PCIe Root Ports 0:1c.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* USB and EHCI 0:1d.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PCI Bridge 0x1e.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PATA/SATA/SMBUS 0:1f.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/mainboard/getac/p470/acpi/i945_pci_irqs.asl b/src/mainboard/getac/p470/acpi/i945_pci_irqs.asl</span><br><span>deleted file mode 100644</span><br><span>index 5bbf144..0000000</span><br><span>--- a/src/mainboard/getac/p470/acpi/i945_pci_irqs.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,82 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2007-2009 coresystems GmbH</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(0, 100%, 40%);">- * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(0, 100%, 40%);">- * published by the Free Software Foundation; version 2 of</span><br><span style="color: hsl(0, 100%, 40%);">- * the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* This is board specific information: IRQ routing for the</span><br><span style="color: hsl(0, 100%, 40%);">- * i945</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-// PCI Interrupt Routing</span><br><span style="color: hsl(0, 100%, 40%);">-Method(_PRT)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- If (PICM) {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Graphics 0:1.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // Onboard graphics (IGD) 0:2.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // Network</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0007ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // High Definition Audio 0:1b.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, 0, 22 },</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Root Ports 0:1c.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- // USB and EHCI 0:1d.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, 0, 23 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // AC97 0:1e.2, 0:1e.3</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 0, 0, 22 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 1, 0, 20 },</span><br><span style="color: hsl(0, 100%, 40%);">- // LPC device 0:1f.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 3, 0, 16 }</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- } Else {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Graphics 0:1.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // Onboard graphics (IGD) 0:2.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // Network 0:7.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0007ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // High Definition Audio 0:1b.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Root Ports 0:1c.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // USB and EHCI 0:1d.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // AC97 0:1e.2, 0:1e.3</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKG, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // LPC device 0:1f.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 }</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/i945_pci_irqs.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/i945_pci_irqs.asl</span><br><span>deleted file mode 100644</span><br><span>index 4aaa33f..0000000</span><br><span>--- a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/i945_pci_irqs.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,75 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2007-2009 coresystems GmbH</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(0, 100%, 40%);">- * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(0, 100%, 40%);">- * published by the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* This is board specific information: IRQ routing for the</span><br><span style="color: hsl(0, 100%, 40%);">- * i945</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-// PCI Interrupt Routing</span><br><span style="color: hsl(0, 100%, 40%);">-Method(_PRT)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- If (PICM) {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Graphics 0:1.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // Onboard graphics (IGD) 0:2.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // High Definition Audio 0:1b.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Root Ports 0:1c.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- // USB and EHCI 0:1d.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- // LPC device 0:1f.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 3, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- } Else {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Graphics 0:1.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // Onboard graphics (IGD) 0:2.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // High Definition Audio 0:1b.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Root Ports 0:1c.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // USB and EHCI 0:1d.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // LPC device 0:1f.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/acpi/x4x_pci_irqs.asl b/src/mainboard/gigabyte/ga-g41m-es2l/acpi/x4x_pci_irqs.asl</span><br><span>deleted file mode 100644</span><br><span>index 46e8a4a..0000000</span><br><span>--- a/src/mainboard/gigabyte/ga-g41m-es2l/acpi/x4x_pci_irqs.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,72 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2015 Damien Zammit <damien@zamaudio.com></span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* This is board specific information: IRQ routing for x4x */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* PCI Interrupt Routing */</span><br><span style="color: hsl(0, 100%, 40%);">-Method(_PRT)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- If (PICM) {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- /* PEG */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* Internal GFX */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* High Definition Audio 0:1b.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PCIe Root Ports 0:1c.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* USB and EHCI 0:1d.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, 0, 23 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* SMBUS/SATA/PATA 0:1f.2, 0:1f.3 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- } Else {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- /* PEG */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* Internal GFX */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* High Definition Audio 0:1b.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PCIe Root Ports 0:1c.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* USB and EHCI 0:1d.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* SMBUS/SATA/PATA 0:1f.2, 0:1f.3 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/mainboard/ibase/mb899/acpi/i945_pci_irqs.asl b/src/mainboard/ibase/mb899/acpi/i945_pci_irqs.asl</span><br><span>deleted file mode 100644</span><br><span>index 0db7bc7..0000000</span><br><span>--- a/src/mainboard/ibase/mb899/acpi/i945_pci_irqs.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,81 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2007-2009 coresystems GmbH</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* This is board specific information: IRQ routing for the</span><br><span style="color: hsl(0, 100%, 40%);">- * i945</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-// PCI Interrupt Routing</span><br><span style="color: hsl(0, 100%, 40%);">-Method(_PRT)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- If (PICM) {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Graphics 0:1.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 1, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 3, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- // Onboard graphics (IGD) 0:2.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // High Definition Audio 0:1b.0</span><br><span style="color: hsl(0, 100%, 40%);">- //Package() { 0x001bffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Root Ports 0:1c.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- // USB and EHCI 0:1d.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, 0, 23 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // AC97/IDE 0:1e.2, 0:1e.3</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 0, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 1, 0, 20 },</span><br><span style="color: hsl(0, 100%, 40%);">- // LPC device 0:1f.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 19},</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- } Else {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Graphics 0:1.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // Onboard graphics (IGD) 0:2.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // High Definition Audio 0:1b.0</span><br><span style="color: hsl(0, 100%, 40%);">- //Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Root Ports 0:1c.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // USB and EHCI 0:1d.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // AC97/IDE 0:1e.2, 0:1e.3</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // LPC device 0:1f.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/mainboard/intel/d510mo/acpi/pineview_pci_irqs.asl b/src/mainboard/intel/d510mo/acpi/pineview_pci_irqs.asl</span><br><span>deleted file mode 100644</span><br><span>index 3fa6fdb..0000000</span><br><span>--- a/src/mainboard/intel/d510mo/acpi/pineview_pci_irqs.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,72 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2007-2009 coresystems GmbH</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2015 Damien Zammit <damien@zamaudio.com></span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* This is board specific information: IRQ routing for pineview */</span><br><span style="color: hsl(0, 100%, 40%);">-/* FIXME: EHCI controller not working yet */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* PCI Interrupt Routing */</span><br><span style="color: hsl(0, 100%, 40%);">-Method(_PRT)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- If (PICM) {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- /* Internal GFX */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* High Definition Audio 0:1b.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, 0, 22 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PCIe Root Ports 0:1c.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* USB and EHCI 0:1d.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, 0, 23 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, 0, 23 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PCI 0:1e.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 0, 0, 22 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* LPC/SATA/SMBUS 0:1f.2, 0:1f.3 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- } Else {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- /* Internal GFX */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* High Definition Audio 0:1b.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PCIe Root Ports 0:1c.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* USB and EHCI 0:1d.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PCI 0:1e.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKG, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* LPC/SATA/SMBUS 0:1f.2, 0:1f.3 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl b/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl</span><br><span>deleted file mode 100644</span><br><span>index a7fcc85..0000000</span><br><span>--- a/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,81 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2007-2009 coresystems GmbH</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(0, 100%, 40%);">- * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(0, 100%, 40%);">- * published by the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* This is board specific information: IRQ routing for the</span><br><span style="color: hsl(0, 100%, 40%);">- * i945</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-// PCI Interrupt Routing</span><br><span style="color: hsl(0, 100%, 40%);">-Method(_PRT)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- If (PICM) {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Graphics 0:1.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 1, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 3, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- // Onboard graphics (IGD) 0:2.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // High Definition Audio 0:1b.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, 0, 22 },</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Root Ports 0:1c.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- // USB and EHCI 0:1d.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, 0, 23 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // AC97 0:1e.2, 0:1e.3</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 0, 0, 22 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 1, 0, 20 },</span><br><span style="color: hsl(0, 100%, 40%);">- // LPC device 0:1f.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- } Else {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Graphics 0:1.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // Onboard graphics (IGD) 0:2.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // High Definition Audio 0:1b.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKF, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Root Ports 0:1c.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // USB and EHCI 0:1d.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // AC97 0:1e.2, 0:1e.3</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKG, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // LPC device 0:1f.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/mainboard/intel/dg43gt/acpi/x4x_pci_irqs.asl b/src/mainboard/intel/dg43gt/acpi/x4x_pci_irqs.asl</span><br><span>deleted file mode 100644</span><br><span>index 8e56679..0000000</span><br><span>--- a/src/mainboard/intel/dg43gt/acpi/x4x_pci_irqs.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,95 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz></span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* This is board specific information: IRQ routing for x4x */</span><br><span style="color: hsl(0, 100%, 40%);">-/* Uses reset defaults + some undocumented device taken from vendor DSDT*/</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* PCI Interrupt Routing */</span><br><span style="color: hsl(0, 100%, 40%);">-Method(_PRT)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- If (PICM) {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- /* PEG */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* Internal GFX */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* ME */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0003ffff, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0003ffff, 1, 0, 0x11 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0003ffff, 2, 0, 0x12 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* ?? */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0016ffff, 0, 0, 0x12 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0016ffff, 1, 0, 0x13 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* GBE 0:19.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0019ffff, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* USB and EHCI */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001affff, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001affff, 1, 0, 0x11 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001affff, 2, 0, 0x12 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* High Definition Audio 0:1b.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PCIe Root Ports 0:1c.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, 0, 0x11 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, 0, 0x12 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, 0, 0x13 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* USB and EHCI 0:1d.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, 0, 0x10 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, 0, 0x11 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, 0, 0x12 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, 0, 0x13 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* SMBUS/SATA/PATA 0:1f.2, 0:1f.3 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 0x11 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 2, 0, 0x12 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 3, 0, 0x13 },</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- } Else {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- /* PEG */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* Internal GFX */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* ME */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0003ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0003ffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0003ffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0016ffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0016ffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* GBE */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0019ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* USB */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001affff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001affff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* High Definition Audio 0:1b.0 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PCIe Root Ports 0:1c.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* USB and EHCI 0:1d.x */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- /* PATA/SATA/SMBUS 0:1f.1-3 */</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl b/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl</span><br><span>deleted file mode 100644</span><br><span>index efb94c6..0000000</span><br><span>--- a/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,81 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2007-2009 coresystems GmbH</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(0, 100%, 40%);">- * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(0, 100%, 40%);">- * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* This is board specific information: IRQ routing for the</span><br><span style="color: hsl(0, 100%, 40%);">- * i945</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-// PCI Interrupt Routing</span><br><span style="color: hsl(0, 100%, 40%);">-Method(_PRT)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- If (PICM) {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Graphics 0:1.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 1, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 3, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- // Onboard graphics (IGD) 0:2.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // High Definition Audio 0:1b.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Root Ports 0:1c.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- // USB and EHCI 0:1d.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, 0, 23 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // AC97/IDE 0:1e.2, 0:1e.3</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 0, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 1, 0, 20 },</span><br><span style="color: hsl(0, 100%, 40%);">- // LPC device 0:1f.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 19},</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- } Else {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Graphics 0:1.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // Onboard graphics (IGD) 0:2.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // High Definition Audio 0:1b.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Root Ports 0:1c.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // USB and EHCI 0:1d.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // AC97/IDE 0:1e.2, 0:1e.3</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // LPC device 0:1f.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/mainboard/lenovo/t60/acpi/i945_pci_irqs.asl b/src/mainboard/lenovo/t60/acpi/i945_pci_irqs.asl</span><br><span>deleted file mode 100644</span><br><span>index f0d76db..0000000</span><br><span>--- a/src/mainboard/lenovo/t60/acpi/i945_pci_irqs.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,58 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org></span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(0, 100%, 40%);">- * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(0, 100%, 40%);">- * published by the Free Software Foundation; version 2 of</span><br><span style="color: hsl(0, 100%, 40%);">- * the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* This is board specific information: IRQ routing for the</span><br><span style="color: hsl(0, 100%, 40%);">- * i945</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-// PCI Interrupt Routing</span><br><span style="color: hsl(0, 100%, 40%);">-Method(_PRT)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- If (PICM) {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, 0, 0x10 }, // VGA</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 1, 0, 0x11 }, // Audio</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, 0, 0x14 }, // PCI bridge</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, 0, 0x15 }, // PCI bridge</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, 0, 0x16 }, // PCI bridge</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, 0, 0x17 }, // PCI bridge</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, 0, 0x10 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, 0, 0x11 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, 0, 0x12 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, 0, 0x13 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, 0, 0x17 }, // LPC</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 0x10 }, // IDE</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 2, 0, 0x10 } // SATA</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- } Else {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, // VGA</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, // Audio</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKE, 0 }, // PCI</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKF, 0 }, // PCI</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKG, 0 }, // PCI</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKH, 0 }, // PCI</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKD, 0 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKH, 0 }, // LPC</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKA, 0 }, // IDE</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKA, 0 } // SATA</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/mainboard/lenovo/x60/acpi/i945_pci_irqs.asl b/src/mainboard/lenovo/x60/acpi/i945_pci_irqs.asl</span><br><span>deleted file mode 100644</span><br><span>index f0d76db..0000000</span><br><span>--- a/src/mainboard/lenovo/x60/acpi/i945_pci_irqs.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,58 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org></span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(0, 100%, 40%);">- * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(0, 100%, 40%);">- * published by the Free Software Foundation; version 2 of</span><br><span style="color: hsl(0, 100%, 40%);">- * the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* This is board specific information: IRQ routing for the</span><br><span style="color: hsl(0, 100%, 40%);">- * i945</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-// PCI Interrupt Routing</span><br><span style="color: hsl(0, 100%, 40%);">-Method(_PRT)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- If (PICM) {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, 0, 0x10 }, // VGA</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 1, 0, 0x11 }, // Audio</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, 0, 0x14 }, // PCI bridge</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, 0, 0x15 }, // PCI bridge</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, 0, 0x16 }, // PCI bridge</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, 0, 0x17 }, // PCI bridge</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, 0, 0x10 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, 0, 0x11 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, 0, 0x12 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, 0, 0x13 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, 0, 0x17 }, // LPC</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 0x10 }, // IDE</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 2, 0, 0x10 } // SATA</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- } Else {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, // VGA</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, // Audio</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKE, 0 }, // PCI</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKF, 0 }, // PCI</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKG, 0 }, // PCI</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKH, 0 }, // PCI</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKD, 0 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKH, 0 }, // LPC</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKA, 0 }, // IDE</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKA, 0 } // SATA</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/mainboard/lenovo/z61t/acpi/i945_pci_irqs.asl b/src/mainboard/lenovo/z61t/acpi/i945_pci_irqs.asl</span><br><span>deleted file mode 100644</span><br><span>index f0d76db..0000000</span><br><span>--- a/src/mainboard/lenovo/z61t/acpi/i945_pci_irqs.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,58 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org></span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(0, 100%, 40%);">- * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(0, 100%, 40%);">- * published by the Free Software Foundation; version 2 of</span><br><span style="color: hsl(0, 100%, 40%);">- * the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* This is board specific information: IRQ routing for the</span><br><span style="color: hsl(0, 100%, 40%);">- * i945</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-// PCI Interrupt Routing</span><br><span style="color: hsl(0, 100%, 40%);">-Method(_PRT)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- If (PICM) {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, 0, 0x10 }, // VGA</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 1, 0, 0x11 }, // Audio</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, 0, 0x14 }, // PCI bridge</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, 0, 0x15 }, // PCI bridge</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, 0, 0x16 }, // PCI bridge</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, 0, 0x17 }, // PCI bridge</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, 0, 0x10 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, 0, 0x11 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, 0, 0x12 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, 0, 0x13 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, 0, 0x17 }, // LPC</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 0x10 }, // IDE</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 2, 0, 0x10 } // SATA</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- } Else {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, // VGA</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, // Audio</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKE, 0 }, // PCI</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKF, 0 }, // PCI</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKG, 0 }, // PCI</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKH, 0 }, // PCI</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKD, 0 }, // USB</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKH, 0 }, // LPC</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKA, 0 }, // IDE</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKA, 0 } // SATA</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl b/src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl</span><br><span>deleted file mode 100644</span><br><span>index a7d999e..0000000</span><br><span>--- a/src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl</span><br><span>+++ /dev/null</span><br><span>@@ -1,79 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/*</span><br><span style="color: hsl(0, 100%, 40%);">- * This file is part of the coreboot project.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (C) 2007-2009 coresystems GmbH</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(0, 100%, 40%);">- * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(0, 100%, 40%);">- * published by the Free Software Foundation; version 2 of</span><br><span style="color: hsl(0, 100%, 40%);">- * the License.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(0, 100%, 40%);">- * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(0, 100%, 40%);">- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(0, 100%, 40%);">- * GNU General Public License for more details.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* This is board specific information: IRQ routing for the</span><br><span style="color: hsl(0, 100%, 40%);">- * i945</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-// PCI Interrupt Routing</span><br><span style="color: hsl(0, 100%, 40%);">-Method(_PRT)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- If (PICM) {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Graphics 0:1.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // Onboard graphics (IGD) 0:2.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // High Definition Audio 0:1b.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, 0, 22 },</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Root Ports 0:1c.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, 0, 17 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- // USB and EHCI 0:1d.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, 0, 23 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, 0, 16 },</span><br><span style="color: hsl(0, 100%, 40%);">- // AC97 0:1e.2, 0:1e.3</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 0, 0, 22 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 1, 0, 20 },</span><br><span style="color: hsl(0, 100%, 40%);">- // LPC device 0:1f.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, 0, 18 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 19 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, 0, 20 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 3, 0, 16 }</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- } Else {</span><br><span style="color: hsl(0, 100%, 40%);">- Return (Package() {</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Graphics 0:1.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // Onboard graphics (IGD) 0:2.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // High Definition Audio 0:1b.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // PCIe Root Ports 0:1c.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // USB and EHCI 0:1d.x</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // AC97 0:1e.2, 0:1e.3</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKG, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- // LPC device 0:1f.0</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },</span><br><span style="color: hsl(0, 100%, 40%);">- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 }</span><br><span style="color: hsl(0, 100%, 40%);">- })</span><br><span style="color: hsl(0, 100%, 40%);">- }</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span>diff --git a/src/northbridge/intel/i945/acpi/hostbridge.asl b/src/northbridge/intel/i945/acpi/hostbridge.asl</span><br><span>index 5877b0e..7b3917d 100644</span><br><span>--- a/src/northbridge/intel/i945/acpi/hostbridge.asl</span><br><span>+++ b/src/northbridge/intel/i945/acpi/hostbridge.asl</span><br><span>@@ -228,6 +228,3 @@</span><br><span> </span><br><span> Return (MCRS)</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* IRQ assignment is mainboard specific. Get it from mainboard ACPI code */</span><br><span style="color: hsl(0, 100%, 40%);">-#include "acpi/i945_pci_irqs.asl"</span><br><span>diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c</span><br><span>index 57f4388..7fa2b7c 100644</span><br><span>--- a/src/northbridge/intel/i945/northbridge.c</span><br><span>+++ b/src/northbridge/intel/i945/northbridge.c</span><br><span>@@ -175,6 +175,22 @@</span><br><span> }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+static const char *northbridge_acpi_name(const struct device *dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ if (dev->path.type == DEVICE_PATH_DOMAIN)</span><br><span style="color: hsl(120, 100%, 40%);">+ return "PCI0";</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (dev->path.type != DEVICE_PATH_PCI)</span><br><span style="color: hsl(120, 100%, 40%);">+ return NULL;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (dev->path.pci.devfn) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case PCI_DEVFN(0, 0):</span><br><span style="color: hsl(120, 100%, 40%);">+ return "MCHC";</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return NULL;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> static struct pci_operations intel_pci_ops = {</span><br><span> .set_subsystem = intel_set_subsystem,</span><br><span> };</span><br><span>@@ -184,6 +200,7 @@</span><br><span> .set_resources = pci_dev_set_resources,</span><br><span> .enable_resources = pci_dev_enable_resources,</span><br><span> .acpi_fill_ssdt_generator = generate_cpu_entries,</span><br><span style="color: hsl(120, 100%, 40%);">+ .acpi_name = northbridge_acpi_name,</span><br><span> .scan_bus = 0,</span><br><span> .ops_pci = &intel_pci_ops,</span><br><span> };</span><br><span>diff --git a/src/northbridge/intel/pineview/acpi/hostbridge.asl b/src/northbridge/intel/pineview/acpi/hostbridge.asl</span><br><span>index d759514..3eff101 100644</span><br><span>--- a/src/northbridge/intel/pineview/acpi/hostbridge.asl</span><br><span>+++ b/src/northbridge/intel/pineview/acpi/hostbridge.asl</span><br><span>@@ -230,6 +230,3 @@</span><br><span> </span><br><span> Return (MCRS)</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* IRQ assignment is mainboard specific. Get it from mainboard ACPI code */</span><br><span style="color: hsl(0, 100%, 40%);">-#include "acpi/pineview_pci_irqs.asl"</span><br><span>diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c</span><br><span>index ea55974..b8ee31f 100644</span><br><span>--- a/src/northbridge/intel/pineview/northbridge.c</span><br><span>+++ b/src/northbridge/intel/pineview/northbridge.c</span><br><span>@@ -147,6 +147,22 @@</span><br><span> pci_write_config32(dev, PCI_COMMAND, reg32);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+static const char *northbridge_acpi_name(const struct device *dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ if (dev->path.type == DEVICE_PATH_DOMAIN)</span><br><span style="color: hsl(120, 100%, 40%);">+ return "PCI0";</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (dev->path.type != DEVICE_PATH_PCI)</span><br><span style="color: hsl(120, 100%, 40%);">+ return NULL;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (dev->path.pci.devfn) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case PCI_DEVFN(0, 0):</span><br><span style="color: hsl(120, 100%, 40%);">+ return "MCHC";</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return NULL;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> static struct device_operations pci_domain_ops = {</span><br><span> .read_resources = mch_domain_read_resources,</span><br><span> .set_resources = mch_domain_set_resources,</span><br><span>@@ -154,6 +170,7 @@</span><br><span> .scan_bus = pci_domain_scan_bus,</span><br><span> .ops_pci_bus = pci_bus_default_ops,</span><br><span> .acpi_fill_ssdt_generator = generate_cpu_entries,</span><br><span style="color: hsl(120, 100%, 40%);">+ .acpi_name = northbridge_acpi_name,</span><br><span> };</span><br><span> </span><br><span> static void cpu_bus_init(device_t dev)</span><br><span>diff --git a/src/northbridge/intel/x4x/acpi/hostbridge.asl b/src/northbridge/intel/x4x/acpi/hostbridge.asl</span><br><span>index 530fdfa..90f15c7 100644</span><br><span>--- a/src/northbridge/intel/x4x/acpi/hostbridge.asl</span><br><span>+++ b/src/northbridge/intel/x4x/acpi/hostbridge.asl</span><br><span>@@ -229,6 +229,3 @@</span><br><span> </span><br><span> Return (MCRS)</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/* IRQ assignment is mainboard specific. Get it from mainboard ACPI code */</span><br><span style="color: hsl(0, 100%, 40%);">-#include "acpi/x4x_pci_irqs.asl"</span><br><span>diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c</span><br><span>index 6ba45fe..f1aff11 100644</span><br><span>--- a/src/northbridge/intel/x4x/northbridge.c</span><br><span>+++ b/src/northbridge/intel/x4x/northbridge.c</span><br><span>@@ -156,6 +156,22 @@</span><br><span> pci_write_config32(dev, PCI_COMMAND, reg32);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+static const char *northbridge_acpi_name(const struct device *dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ if (dev->path.type == DEVICE_PATH_DOMAIN)</span><br><span style="color: hsl(120, 100%, 40%);">+ return "PCI0";</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (dev->path.type != DEVICE_PATH_PCI)</span><br><span style="color: hsl(120, 100%, 40%);">+ return NULL;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (dev->path.pci.devfn) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case PCI_DEVFN(0, 0):</span><br><span style="color: hsl(120, 100%, 40%);">+ return "MCHC";</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return NULL;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> static struct device_operations pci_domain_ops = {</span><br><span> .read_resources = mch_domain_read_resources,</span><br><span> .set_resources = mch_domain_set_resources,</span><br><span>@@ -164,6 +180,7 @@</span><br><span> .ops_pci_bus = pci_bus_default_ops,</span><br><span> .write_acpi_tables = northbridge_write_acpi_tables,</span><br><span> .acpi_fill_ssdt_generator = generate_cpu_entries,</span><br><span style="color: hsl(120, 100%, 40%);">+ .acpi_name = northbridge_acpi_name,</span><br><span> };</span><br><span> </span><br><span> </span><br><span>diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig</span><br><span>index 9fd19ed..6c7f5d5 100644</span><br><span>--- a/src/southbridge/intel/i82801gx/Kconfig</span><br><span>+++ b/src/southbridge/intel/i82801gx/Kconfig</span><br><span>@@ -26,6 +26,7 @@</span><br><span> select SOUTHBRIDGE_INTEL_COMMON_GPIO</span><br><span> select SOUTHBRIDGE_INTEL_COMMON_SMBUS</span><br><span> select SOUTHBRIDGE_INTEL_COMMON_SPI</span><br><span style="color: hsl(120, 100%, 40%);">+ select SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN</span><br><span> </span><br><span> if SOUTHBRIDGE_INTEL_I82801GX</span><br><span> </span><br><span>@@ -33,6 +34,10 @@</span><br><span> hex</span><br><span> default 0xfef00000</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+config DEFAULT_RCBA</span><br><span style="color: hsl(120, 100%, 40%);">+ hex</span><br><span style="color: hsl(120, 100%, 40%);">+ default 0xfed1c000</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> config BOOTBLOCK_SOUTHBRIDGE_INIT</span><br><span> string</span><br><span> default "southbridge/intel/i82801gx/bootblock.c"</span><br><span>diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h</span><br><span>index b3c1b48..3e0f998 100644</span><br><span>--- a/src/southbridge/intel/i82801gx/i82801gx.h</span><br><span>+++ b/src/southbridge/intel/i82801gx/i82801gx.h</span><br><span>@@ -32,9 +32,9 @@</span><br><span> #define DEFAULT_PMBASE 0x0500</span><br><span> </span><br><span> #ifndef __ACPI__</span><br><span style="color: hsl(0, 100%, 40%);">-#define DEFAULT_RCBA ((u8 *)0xfed1c000)</span><br><span style="color: hsl(120, 100%, 40%);">+#define DEFAULT_RCBA ((u8 *)CONFIG_DEFAULT_RCBA)</span><br><span> #else</span><br><span style="color: hsl(0, 100%, 40%);">-#define DEFAULT_RCBA 0xfed1c000</span><br><span style="color: hsl(120, 100%, 40%);">+#define DEFAULT_RCBA CONFIG_DEFAULT_RCBA</span><br><span> #endif</span><br><span> </span><br><span> #ifndef __ACPI__</span><br><span>diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c</span><br><span>index a26b9f8..c53d3e3 100644</span><br><span>--- a/src/southbridge/intel/i82801gx/lpc.c</span><br><span>+++ b/src/southbridge/intel/i82801gx/lpc.c</span><br><span>@@ -32,6 +32,7 @@</span><br><span> #include <cbmem.h></span><br><span> #include <string.h></span><br><span> #include <drivers/intel/gma/i915.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <southbridge/intel/common/acpi_pirq_gen.h></span><br><span> #include "nvs.h"</span><br><span> </span><br><span> #define NMI_OFF 0</span><br><span>@@ -684,6 +685,19 @@</span><br><span> }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+static const char *lpc_acpi_name(const struct device *dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ return "LPCB";</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void southbridge_fill_ssdt(device_t device)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Generates PIRQ ACPI table with assumption DxxIR are at</span><br><span style="color: hsl(120, 100%, 40%);">+ * reset default. */</span><br><span style="color: hsl(120, 100%, 40%);">+ gen_def_acpi_pirq();</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> static struct pci_operations pci_ops = {</span><br><span> .set_subsystem = set_subsystem,</span><br><span> };</span><br><span>@@ -694,6 +708,8 @@</span><br><span> .enable_resources = pci_dev_enable_resources,</span><br><span> .acpi_inject_dsdt_generator = southbridge_inject_dsdt,</span><br><span> .write_acpi_tables = acpi_write_hpet,</span><br><span style="color: hsl(120, 100%, 40%);">+ .acpi_fill_ssdt_generator = southbridge_fill_ssdt,</span><br><span style="color: hsl(120, 100%, 40%);">+ .acpi_name = lpc_acpi_name,</span><br><span> .init = lpc_init,</span><br><span> .scan_bus = scan_lpc_bus,</span><br><span> .enable = i82801gx_enable,</span><br><span>diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig</span><br><span>index e418a94..eef69c5 100644</span><br><span>--- a/src/southbridge/intel/i82801jx/Kconfig</span><br><span>+++ b/src/southbridge/intel/i82801jx/Kconfig</span><br><span>@@ -19,6 +19,7 @@</span><br><span> select SOUTHBRIDGE_INTEL_COMMON</span><br><span> select SOUTHBRIDGE_INTEL_COMMON_SMBUS</span><br><span> select SOUTHBRIDGE_INTEL_COMMON_SPI</span><br><span style="color: hsl(120, 100%, 40%);">+ select SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN</span><br><span> select IOAPIC</span><br><span> select HAVE_USBDEBUG</span><br><span> select HAVE_HARD_RESET</span><br><span>@@ -35,6 +36,10 @@</span><br><span> hex</span><br><span> default 0xfef00000</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+config DEFAULT_RCBA</span><br><span style="color: hsl(120, 100%, 40%);">+ hex</span><br><span style="color: hsl(120, 100%, 40%);">+ default 0xfed1c000</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> config HPET_MIN_TICKS</span><br><span> hex</span><br><span> default 0x80</span><br><span>diff --git a/src/southbridge/intel/i82801jx/i82801jx.h b/src/southbridge/intel/i82801jx/i82801jx.h</span><br><span>index 9b0f955..ed045a6 100644</span><br><span>--- a/src/southbridge/intel/i82801jx/i82801jx.h</span><br><span>+++ b/src/southbridge/intel/i82801jx/i82801jx.h</span><br><span>@@ -26,9 +26,9 @@</span><br><span> </span><br><span> #define DEFAULT_TBAR ((u8 *)0xfed1b000)</span><br><span> #ifndef __ACPI__</span><br><span style="color: hsl(0, 100%, 40%);">-#define DEFAULT_RCBA ((u8 *)0xfed1c000)</span><br><span style="color: hsl(120, 100%, 40%);">+#define DEFAULT_RCBA ((u8 *)CONFIG_DEFAULT_RCBA)</span><br><span> #else</span><br><span style="color: hsl(0, 100%, 40%);">-#define DEFAULT_RCBA 0xfed1c000</span><br><span style="color: hsl(120, 100%, 40%);">+#define DEFAULT_RCBA CONFIG_DEFAULT_RCBA</span><br><span> #endif</span><br><span> </span><br><span> #define DEFAULT_PMBASE 0x00000500</span><br><span>diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c</span><br><span>index 18025ff..47388e8 100644</span><br><span>--- a/src/southbridge/intel/i82801jx/lpc.c</span><br><span>+++ b/src/southbridge/intel/i82801jx/lpc.c</span><br><span>@@ -34,6 +34,7 @@</span><br><span> #include "i82801jx.h"</span><br><span> #include "nvs.h"</span><br><span> #include <southbridge/intel/common/pciehp.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <southbridge/intel/common/acpi_pirq_gen.h></span><br><span> #include <drivers/intel/gma/i915.h></span><br><span> </span><br><span> #define NMI_OFF 0</span><br><span>@@ -720,12 +721,22 @@</span><br><span> }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+static const char *lpc_acpi_name(const struct device *dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ return "LPCB";</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> static void southbridge_fill_ssdt(device_t device)</span><br><span> {</span><br><span> device_t dev = dev_find_slot(0, PCI_DEVFN(0x1f,0));</span><br><span> config_t *chip = dev->chip_info;</span><br><span> </span><br><span> intel_acpi_pcie_hotplug_generator(chip->pcie_hotplug_map, 8);</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Generates PIRQ ACPI table with assumption DxxIR are at</span><br><span style="color: hsl(120, 100%, 40%);">+ * reset default.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ gen_def_acpi_pirq();</span><br><span> }</span><br><span> </span><br><span> static struct pci_operations pci_ops = {</span><br><span>@@ -739,6 +750,7 @@</span><br><span> .acpi_inject_dsdt_generator = southbridge_inject_dsdt,</span><br><span> .write_acpi_tables = acpi_write_hpet,</span><br><span> .acpi_fill_ssdt_generator = southbridge_fill_ssdt,</span><br><span style="color: hsl(120, 100%, 40%);">+ .acpi_name = lpc_acpi_name,</span><br><span> .init = lpc_init,</span><br><span> .scan_bus = scan_lpc_bus,</span><br><span> .ops_pci = &pci_ops,</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/22981">change 22981</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22981"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I286d251ddf8fcae27dd07011a1cd62d8f4847683 </div>
<div style="display:none"> Gerrit-Change-Number: 22981 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>