<p>Marshall Dawson has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22937">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">drivers/mrc_cache: Make bootstate for SPI writes variable<br><br>The default bootstate for writing MRC data to flash is BS_DEV_ENUMERATE<br>but this is too early for some implementations. Add options to Kconfig<br>for allowing a different bootstate to be selected.<br><br>It is assumed SPI lockdown will always execute in the state immediately<br>following writing to flash. The latest that may be allowed is<br>BS_OS_RESUME_CHECK, so the latest MRC data may be written is<br>BS_POST_DEVICE. The earliest is maintained at BS_DEV_ENUMERATE.<br><br>Change-Id: Ie7ba9070829d98414ee788e14d1a768145d742ea<br>Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com><br>---<br>M src/drivers/mrc_cache/Kconfig<br>M src/drivers/mrc_cache/mrc_cache.c<br>2 files changed, 35 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/22937/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/drivers/mrc_cache/Kconfig b/src/drivers/mrc_cache/Kconfig</span><br><span>index 3e0bdda..e15696d 100644</span><br><span>--- a/src/drivers/mrc_cache/Kconfig</span><br><span>+++ b/src/drivers/mrc_cache/Kconfig</span><br><span>@@ -28,4 +28,21 @@</span><br><span> bool</span><br><span> default n</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+config MRC_WRITE_BOOTSTATE</span><br><span style="color: hsl(120, 100%, 40%);">+ int "Write MRC settings at bootstate"</span><br><span style="color: hsl(120, 100%, 40%);">+ range 2 6</span><br><span style="color: hsl(120, 100%, 40%);">+ default 2 # BS_DEV_ENUMERATE</span><br><span style="color: hsl(120, 100%, 40%);">+ help</span><br><span style="color: hsl(120, 100%, 40%);">+ This option specifies when the MRC settings are written to NVRAM.</span><br><span style="color: hsl(120, 100%, 40%);">+ The write occurs at the end of the bootstate indicated. These</span><br><span style="color: hsl(120, 100%, 40%);">+ definitions must be kept in sync with boot_state_t:</span><br><span style="color: hsl(120, 100%, 40%);">+ 2: BS_DEV_ENUMERATE,</span><br><span style="color: hsl(120, 100%, 40%);">+ 3: BS_DEV_RESOURCES,</span><br><span style="color: hsl(120, 100%, 40%);">+ 4: BS_DEV_ENABLE,</span><br><span style="color: hsl(120, 100%, 40%);">+ 5: BS_DEV_INIT,</span><br><span style="color: hsl(120, 100%, 40%);">+ 6: BS_POST_DEVICE,</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Any NVRAM lockdown procedure will be run in the stage after writing</span><br><span style="color: hsl(120, 100%, 40%);">+ the MRC settings, and before BS_OS_RESUME.</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> endif # CACHE_MRC_SETTINGS</span><br><span>diff --git a/src/drivers/mrc_cache/mrc_cache.c b/src/drivers/mrc_cache/mrc_cache.c</span><br><span>index 3a96896..c76f613 100644</span><br><span>--- a/src/drivers/mrc_cache/mrc_cache.c</span><br><span>+++ b/src/drivers/mrc_cache/mrc_cache.c</span><br><span>@@ -574,8 +574,23 @@</span><br><span> }</span><br><span> </span><br><span> /*</span><br><span style="color: hsl(0, 100%, 40%);">- * Ensures MRC training data is stored into SPI after PCI enumeration is done</span><br><span style="color: hsl(0, 100%, 40%);">- * during BS_DEV_ENUMERATE-BS_ON_EXIT and lock down SPI protected ranges</span><br><span style="color: hsl(0, 100%, 40%);">- * during BS_DEV_RESOURCES-BS_ON_EXIT.</span><br><span style="color: hsl(120, 100%, 40%);">+ * Ensures MRC training data is stored into SPI after PCI enumeration is done.</span><br><span style="color: hsl(120, 100%, 40%);">+ * Some implementations may be require this to be later than others. Locking</span><br><span style="color: hsl(120, 100%, 40%);">+ * down SPI protected ranges will occur at the end of the subsequent bootstate.</span><br><span> */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#if CONFIG_MRC_WRITE_BOOTSTATE == 8 /* BS_OS_RESUME */</span><br><span style="color: hsl(120, 100%, 40%);">+#error "Choose a different bootstate for writing MRC cache data"</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#if CONFIG_MRC_WRITE_BOOTSTATE == 2</span><br><span> BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_EXIT, update_mrc_cache, NULL);</span><br><span style="color: hsl(120, 100%, 40%);">+#elif CONFIG_MRC_WRITE_BOOTSTATE == 3</span><br><span style="color: hsl(120, 100%, 40%);">+BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_EXIT, update_mrc_cache, NULL);</span><br><span style="color: hsl(120, 100%, 40%);">+#elif CONFIG_MRC_WRITE_BOOTSTATE == 4</span><br><span style="color: hsl(120, 100%, 40%);">+BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_EXIT, update_mrc_cache, NULL);</span><br><span style="color: hsl(120, 100%, 40%);">+#elif CONFIG_MRC_WRITE_BOOTSTATE == 5</span><br><span style="color: hsl(120, 100%, 40%);">+BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, update_mrc_cache, NULL);</span><br><span style="color: hsl(120, 100%, 40%);">+#elif CONFIG_MRC_WRITE_BOOTSTATE == 6</span><br><span style="color: hsl(120, 100%, 40%);">+BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, update_mrc_cache, NULL);</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/22937">change 22937</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ie7ba9070829d98414ee788e14d1a768145d742ea </div>
<div style="display:none"> Gerrit-Change-Number: 22937 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marshall Dawson <marshalldawson3rd@gmail.com> </div>