<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22911">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/intel/x4x: Fix programming CxDRB<br><br>Programming CxDRB should be cumulative as explain in<br>"Intel ® 4 Series Chipset Family datasheet".<br><br>This also removes some dead code.<br><br>Change-Id: I7ff3264824c843f84b9eb6c06a06aa3f151fe4b3<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/northbridge/intel/x4x/raminit_ddr2.c<br>1 file changed, 9 insertions(+), 36 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/22911/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/northbridge/intel/x4x/raminit_ddr2.c b/src/northbridge/intel/x4x/raminit_ddr2.c<br>index 807c5a7..f0c4743 100644<br>--- a/src/northbridge/intel/x4x/raminit_ddr2.c<br>+++ b/src/northbridge/intel/x4x/raminit_ddr2.c<br>@@ -48,24 +48,6 @@<br>      return mhz[speed];<br> }<br> <br>-/* Find MSB bitfield location using bit scan reverse instruction */<br>-static u8 msbpos(u32 val)<br>-{<br>-      u32 pos;<br>-<br>-  if (val == 0) {<br>-              printk(BIOS_WARNING, "WARNING: Input to BSR is zero\n");<br>-           return 0;<br>-    }<br>-<br>- asm ("bsrl %1, %0"<br>-         : "=r"(pos)<br>-                : "r"(val)<br>- );<br>-<br>-        return (u8)(pos & 0xff);<br>-}<br>-<br> static void clkcross_ddr2(struct sysinfo *s)<br> {<br>        u8 i, j;<br>@@ -1251,19 +1233,18 @@<br>             MCHBAR8(0x660) = MCHBAR8(0x660) | 1;<br> <br>       // DRB<br>-       FOR_EACH_POPULATED_RANK(s->dimms, ch, r) {<br>-                if (s->dimms[ch<<1].card_type != RAW_CARD_UNPOPULATED<br>-                               && (r) < s->dimms[ch<<1].ranks)<br>-                  i = ch << 1;<br>-           else<br>-                 i = (ch << 1) + 1;<br>+     FOR_EACH_RANK(ch, r) {<br>                if (ch == 0) {<br>-                       dra0 = (c0dra >> (8*r)) & 0x7f;<br>-                    c0drb = (u16)(c0drb + drbtab[dra0]);<br>+                 if (RANK_IS_POPULATED(s->dimms, ch, r)) {<br>+                         dra0 = (c0dra >> (8*r)) & 0x7f;<br>+                            c0drb = (u16)(c0drb + drbtab[dra0]);<br>+                 }<br>                     MCHBAR16(0x200 + 2*r) = c0drb;<br>                } else {<br>-                     dra1 = (c1dra >> (8*r)) & 0x7f;<br>-                    c1drb = (u16)(c1drb + drbtab[dra1]);<br>+                 if (RANK_IS_POPULATED(s->dimms, ch, r)) {<br>+                         dra1 = (c1dra >> (8*r)) & 0x7f;<br>+                            c1drb = (u16)(c1drb + drbtab[dra1]);<br>+                 }<br>                     MCHBAR16(0x600 + 2*r) = c1drb;<br>                }<br>     }<br>@@ -1273,14 +1254,6 @@<br>     totalmemorymb = s->channel_capacity[0] + s->channel_capacity[1];<br>        printk(BIOS_DEBUG, "Total memory: %d + %d = %dMiB\n",<br>               s->channel_capacity[0], s->channel_capacity[1], totalmemorymb);<br>-<br>-     rankpop1 >>= 4;<br>-        if (rankpop1) {<br>-              MCHBAR16(0x600 + 2*msbpos(rankpop1)) = c0drb + c1drb;<br>-                MCHBAR16(0x602 + 2*msbpos(rankpop1)) = c0drb + c1drb;<br>-                MCHBAR16(0x604 + 2*msbpos(rankpop1)) = c0drb + c1drb;<br>-                MCHBAR16(0x606 + 2*msbpos(rankpop1)) = c0drb + c1drb;<br>-        }<br> <br>  /* Populated channel sizes in MiB */<br>  size0 = s->channel_capacity[0];<br></pre><p>To view, visit <a href="https://review.coreboot.org/22911">change 22911</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22911"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I7ff3264824c843f84b9eb6c06a06aa3f151fe4b3 </div>
<div style="display:none"> Gerrit-Change-Number: 22911 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>