<p>Tobias Diedrich has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22859">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">intel/bd82x6x: Use generated ACPI PIRQ<br><br>Enable https://review.coreboot.org/#/c/22810/ for BD82X6X.<br><br>This generates the main ACPI _PRT table automatically based on the<br>chipset registers.<br><br>Tested on Intel NUC DCP847SKE with Linux 4.13.14:<br>$ cat /proc/interrupts<br> CPU0 CPU1<br> 0: 23 0 IO-APIC 2-edge timer<br> 8: 1 0 IO-APIC 8-edge rtc0<br> 9: 0 0 IO-APIC 9-fasteoi acpi<br> 19: 86 0 IO-APIC 19-fasteoi ehci_hcd:usb1<br> 23: 0 0 IO-APIC 23-fasteoi i801_smbus<br>[...MSI and other interrupts skipped...]<br><br>Log messages:<br>ACPI_PIRQ_GEN PCI: 00:02.0: pin=1 pirq=1<br>ACPI_PIRQ_GEN PCI: 00:1b.0: pin=1 pirq=1<br>ACPI_PIRQ_GEN PCI: 00:1c.0: pin=1 pirq=2<br>ACPI_PIRQ_GEN PCI: 00:1c.1: pin=2 pirq=6<br>ACPI_PIRQ_GEN PCI: 00:1c.2: pin=3 pirq=4<br>ACPI_PIRQ_GEN PCI: 00:1d.0: pin=1 pirq=4<br>ACPI_PIRQ_GEN PCI: 00:1f.2: pin=1 pirq=2<br>ACPI_PIRQ_GEN PCI: 00:1f.3: pin=2 pirq=8<br>ACPI_PIRQ_GEN PCI: 00:04.0: pin=1 pirq=1<br><br>Generated _PRT:<br> Scope (\_SB.PCI0)<br> {<br> Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table<br> {<br> If (PICM)<br> {<br> Return (Package (0x09)<br> {<br> Package (0x04)<br> {<br> 0x0002FFFF,<br> 0x00000000,<br> 0x00000000,<br> 0x00000010<br> },<br><br> Package (0x04)<br> {<br> 0x001BFFFF,<br> 0x00000000,<br> 0x00000000,<br> 0x00000010<br> },<br><br> Package (0x04)<br> {<br> 0x001CFFFF,<br> 0x00000000,<br> 0x00000000,<br> 0x00000011<br> },<br><br> Package (0x04)<br> {<br> 0x001CFFFF,<br> 0x00000001,<br> 0x00000000,<br> 0x00000015<br> },<br><br> Package (0x04)<br> {<br> 0x001CFFFF,<br> 0x00000002,<br> 0x00000000,<br> 0x00000013<br> },<br><br> Package (0x04)<br> {<br> 0x001DFFFF,<br> 0x00000000,<br> 0x00000000,<br> 0x00000013<br> },<br><br> Package (0x04)<br> {<br> 0x001FFFFF,<br> 0x00000000,<br> 0x00000000,<br> 0x00000011<br> },<br><br> Package (0x04)<br> {<br> 0x001FFFFF,<br> 0x00000001,<br> 0x00000000,<br> 0x00000017<br> },<br><br> Package (0x04)<br> {<br> 0x0004FFFF,<br> 0x00000000,<br> 0x00000000,<br> 0x00000010<br> }<br> })<br> }<br> Else<br> {<br> Return (Package (0x09)<br> {<br> Package (0x04)<br> {<br> 0x0002FFFF,<br> 0x00000000,<br> \_SB.PCI0.LPCB.LNKA,<br> 0x00000000<br> },<br><br> Package (0x04)<br> {<br> 0x001BFFFF,<br> 0x00000000,<br> \_SB.PCI0.LPCB.LNKA,<br> 0x00000000<br> },<br><br> Package (0x04)<br> {<br> 0x001CFFFF,<br> 0x00000000,<br> \_SB.PCI0.LPCB.LNKB,<br> 0x00000000<br> },<br><br> Package (0x04)<br> {<br> 0x001CFFFF,<br> 0x00000001,<br> \_SB.PCI0.LPCB.LNKF,<br> 0x00000000<br> },<br><br> Package (0x04)<br> {<br> 0x001CFFFF,<br> 0x00000002,<br> \_SB.PCI0.LPCB.LNKD,<br> 0x00000000<br> },<br><br> Package (0x04)<br> {<br> 0x001DFFFF,<br> 0x00000000,<br> \_SB.PCI0.LPCB.LNKD,<br> 0x00000000<br> },<br><br> Package (0x04)<br> {<br> 0x001FFFFF,<br> 0x00000000,<br> \_SB.PCI0.LPCB.LNKB,<br> 0x00000000<br> },<br><br> Package (0x04)<br> {<br> 0x001FFFFF,<br> 0x00000001,<br> \_SB.PCI0.LPCB.LNKH,<br> 0x00000000<br> },<br><br> Package (0x04)<br> {<br> 0x0004FFFF,<br> 0x00000000,<br> \_SB.PCI0.LPCB.LNKA,<br> 0x00000000<br> }<br> })<br> }<br> }<br> }<br><br>Change-Id: I832a86925283d61b64b8268246d9e6f11994c120<br>Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de><br>---<br>M src/mainboard/apple/macbookair4_2/dsdt.asl<br>M src/mainboard/asrock/b75pro3-m/dsdt.asl<br>M src/mainboard/compulab/intense_pc/dsdt.asl<br>M src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl<br>M src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl<br>D src/mainboard/google/butterfly/acpi/sandybridge_pci_irqs.asl<br>M src/mainboard/google/butterfly/dsdt.asl<br>D src/mainboard/google/link/acpi/sandybridge_pci_irqs.asl<br>M src/mainboard/google/link/dsdt.asl<br>D src/mainboard/google/parrot/acpi/sandybridge_pci_irqs.asl<br>M src/mainboard/google/parrot/dsdt.asl<br>D src/mainboard/google/stout/acpi/sandybridge_pci_irqs.asl<br>M src/mainboard/google/stout/dsdt.asl<br>M src/mainboard/hp/2570p/dsdt.asl<br>M src/mainboard/hp/2760p/dsdt.asl<br>M src/mainboard/hp/8460p/dsdt.asl<br>M src/mainboard/hp/8470p/dsdt.asl<br>M src/mainboard/intel/emeraldlake2/dsdt.asl<br>M src/mainboard/kontron/ktqm77/dsdt.asl<br>M src/mainboard/lenovo/l520/dsdt.asl<br>M src/mainboard/lenovo/s230u/dsdt.asl<br>M src/mainboard/lenovo/t420/dsdt.asl<br>M src/mainboard/lenovo/t420s/dsdt.asl<br>M src/mainboard/lenovo/t430/dsdt.asl<br>M src/mainboard/lenovo/t430s/dsdt.asl<br>M src/mainboard/lenovo/t520/dsdt.asl<br>M src/mainboard/lenovo/t530/dsdt.asl<br>M src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl<br>M src/mainboard/lenovo/x201/dsdt.asl<br>M src/mainboard/lenovo/x220/dsdt.asl<br>M src/mainboard/lenovo/x230/dsdt.asl<br>M src/mainboard/packardbell/ms2290/dsdt.asl<br>M src/mainboard/roda/rv11/dsdt.asl<br>D src/mainboard/samsung/lumpy/acpi/sandybridge_pci_irqs.asl<br>M src/mainboard/samsung/lumpy/dsdt.asl<br>D src/mainboard/samsung/stumpy/acpi/sandybridge_pci_irqs.asl<br>M src/mainboard/samsung/stumpy/dsdt.asl<br>M src/mainboard/sapphire/pureplatinumh61/dsdt.asl<br>M src/southbridge/intel/bd82x6x/Kconfig<br>D src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl<br>M src/southbridge/intel/bd82x6x/lpc.c<br>41 files changed, 3 insertions(+), 494 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/22859/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/mainboard/apple/macbookair4_2/dsdt.asl b/src/mainboard/apple/macbookair4_2/dsdt.asl<br>index 924fb74..b8573c2 100644<br>--- a/src/mainboard/apple/macbookair4_2/dsdt.asl<br>+++ b/src/mainboard/apple/macbookair4_2/dsdt.asl<br>@@ -1,4 +1,3 @@<br>-/*<br> * This file is part of the coreboot project.<br> *<br> * This program is free software; you can redistribute it and/or modify<br>@@ -36,7 +35,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/asrock/b75pro3-m/dsdt.asl b/src/mainboard/asrock/b75pro3-m/dsdt.asl<br>index 454ee3d..f01afa2 100644<br>--- a/src/mainboard/asrock/b75pro3-m/dsdt.asl<br>+++ b/src/mainboard/asrock/b75pro3-m/dsdt.asl<br>@@ -40,7 +40,6 @@<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> #include "acpi/pci.asl"<br> }<br> }<br>diff --git a/src/mainboard/compulab/intense_pc/dsdt.asl b/src/mainboard/compulab/intense_pc/dsdt.asl<br>index 486ad43..a3fa256 100644<br>--- a/src/mainboard/compulab/intense_pc/dsdt.asl<br>+++ b/src/mainboard/compulab/intense_pc/dsdt.asl<br>@@ -40,7 +40,6 @@<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> }<br> }<br> }<br>diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl b/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl<br>index 10faccd..a22fa5c 100644<br>--- a/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl<br>+++ b/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl<br>@@ -21,7 +21,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl b/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl<br>index 10faccd..a22fa5c 100644<br>--- a/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl<br>+++ b/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl<br>@@ -21,7 +21,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/google/butterfly/acpi/sandybridge_pci_irqs.asl b/src/mainboard/google/butterfly/acpi/sandybridge_pci_irqs.asl<br>deleted file mode 100644<br>index b837442..0000000<br>--- a/src/mainboard/google/butterfly/acpi/sandybridge_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,60 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2007-2009 coresystems GmbH<br>- *<br>- * This program is free software; you can redistribute it and/or modify<br>- * it under the terms of the GNU General Public License as published by<br>- * the Free Software Foundation; version 2 of the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for Sandybridge */<br>-<br>-// PCI Interrupt Routing<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, 0, 16 },// GFX INTA -> PIRQA (MSI)<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, 0, 16 },// D27IP_ZIP HDA INTA -> PIRQA (MSI)<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, 0, 17 },// D28IP_P1IP WLAN INTA -> PIRQB<br>- Package() { 0x001cffff, 1, 0, 21 },// D28IP_P2IP ETH0 INTB -> PIRQF<br>- Package() { 0x001cffff, 2, 0, 19 },// D28IP_P3IP SDCARD INTC -> PIRQD<br>- // EHCI #1 0:1d.0<br>- Package() { 0x001dffff, 0, 0, 19 },// D29IP_E1P EHCI1 INTA -> PIRQD<br>- // EHCI #2 0:1a.0<br>- Package() { 0x001affff, 0, 0, 21 },// D26IP_E2P EHCI2 INTA -> PIRQF<br>- // LPC devices 0:1f.0<br>- Package() { 0x001fffff, 0, 0, 17 }, // D31IP_SIP SATA INTA -> PIRQB (MSI)<br>- Package() { 0x001fffff, 1, 0, 23 }, // D31IP_SMIP SMBUS INTB -> PIRQH<br>- Package() { 0x001fffff, 2, 0, 16 }, // D31IP_TTIP THRT INTC -> PIRQA<br>- })<br>- } Else {<br>- Return (Package() {<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKF, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // EHCI #1 0:1d.0<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // EHCI #2 0:1a.0<br>- Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKF, 0 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKH, 0 },<br>- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKA, 0 },<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/google/butterfly/dsdt.asl b/src/mainboard/google/butterfly/dsdt.asl<br>index 3e13a41..c1ea0e6 100644<br>--- a/src/mainboard/google/butterfly/dsdt.asl<br>+++ b/src/mainboard/google/butterfly/dsdt.asl<br>@@ -44,7 +44,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include "acpi/sandybridge_pci_irqs.asl"<br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/google/link/acpi/sandybridge_pci_irqs.asl b/src/mainboard/google/link/acpi/sandybridge_pci_irqs.asl<br>deleted file mode 100644<br>index 6aebd13..0000000<br>--- a/src/mainboard/google/link/acpi/sandybridge_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,64 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2007-2009 coresystems GmbH<br>- *<br>- * This program is free software; you can redistribute it and/or modify<br>- * it under the terms of the GNU General Public License as published by<br>- * the Free Software Foundation; version 2 of the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for Sandybridge */<br>-<br>-// PCI Interrupt Routing<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, 0, 16 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, 0, 16 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, 0, 19 },<br>- Package() { 0x001cffff, 1, 0, 20 },<br>- Package() { 0x001cffff, 2, 0, 17 },<br>- Package() { 0x001cffff, 3, 0, 18 },<br>- // EHCI #1 0:1d.0<br>- Package() { 0x001dffff, 0, 0, 19 },<br>- // EHCI #2 0:1a.0<br>- Package() { 0x001affff, 0, 0, 21 },<br>- // LPC devices 0:1f.0<br>- Package() { 0x001fffff, 0, 0, 17 },<br>- Package() { 0x001fffff, 1, 0, 23 },<br>- Package() { 0x001fffff, 2, 0, 16 },<br>- Package() { 0x001fffff, 3, 0, 18 },<br>- })<br>- } Else {<br>- Return (Package() {<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKE, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKC, 0 },<br>- // EHCI #1 0:1d.0<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // EHCI #2 0:1a.0<br>- Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKF, 0 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKH, 0 },<br>- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKC, 0 },<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/google/link/dsdt.asl b/src/mainboard/google/link/dsdt.asl<br>index da4587d..82fb3f6 100644<br>--- a/src/mainboard/google/link/dsdt.asl<br>+++ b/src/mainboard/google/link/dsdt.asl<br>@@ -44,7 +44,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include "acpi/sandybridge_pci_irqs.asl"<br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/google/parrot/acpi/sandybridge_pci_irqs.asl b/src/mainboard/google/parrot/acpi/sandybridge_pci_irqs.asl<br>deleted file mode 100644<br>index 6aebd13..0000000<br>--- a/src/mainboard/google/parrot/acpi/sandybridge_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,64 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2007-2009 coresystems GmbH<br>- *<br>- * This program is free software; you can redistribute it and/or modify<br>- * it under the terms of the GNU General Public License as published by<br>- * the Free Software Foundation; version 2 of the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for Sandybridge */<br>-<br>-// PCI Interrupt Routing<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, 0, 16 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, 0, 16 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, 0, 19 },<br>- Package() { 0x001cffff, 1, 0, 20 },<br>- Package() { 0x001cffff, 2, 0, 17 },<br>- Package() { 0x001cffff, 3, 0, 18 },<br>- // EHCI #1 0:1d.0<br>- Package() { 0x001dffff, 0, 0, 19 },<br>- // EHCI #2 0:1a.0<br>- Package() { 0x001affff, 0, 0, 21 },<br>- // LPC devices 0:1f.0<br>- Package() { 0x001fffff, 0, 0, 17 },<br>- Package() { 0x001fffff, 1, 0, 23 },<br>- Package() { 0x001fffff, 2, 0, 16 },<br>- Package() { 0x001fffff, 3, 0, 18 },<br>- })<br>- } Else {<br>- Return (Package() {<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKE, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKC, 0 },<br>- // EHCI #1 0:1d.0<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // EHCI #2 0:1a.0<br>- Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKF, 0 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKH, 0 },<br>- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKC, 0 },<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/google/parrot/dsdt.asl b/src/mainboard/google/parrot/dsdt.asl<br>index d179dea..4f2f986 100644<br>--- a/src/mainboard/google/parrot/dsdt.asl<br>+++ b/src/mainboard/google/parrot/dsdt.asl<br>@@ -43,7 +43,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include "acpi/sandybridge_pci_irqs.asl"<br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/google/stout/acpi/sandybridge_pci_irqs.asl b/src/mainboard/google/stout/acpi/sandybridge_pci_irqs.asl<br>deleted file mode 100644<br>index 64ec07f..0000000<br>--- a/src/mainboard/google/stout/acpi/sandybridge_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,68 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2007-2009 coresystems GmbH<br>- *<br>- * This program is free software; you can redistribute it and/or modify<br>- * it under the terms of the GNU General Public License as published by<br>- * the Free Software Foundation; version 2 of the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for Sandybridge */<br>-<br>-// PCI Interrupt Routing<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, 0, 16 },<br>- // XHCI 0:14.0<br>- Package() { 0x0014ffff, 0, 0, 19 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, 0, 16 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, 0, 19 },<br>- Package() { 0x001cffff, 1, 0, 20 },<br>- Package() { 0x001cffff, 2, 0, 17 },<br>- Package() { 0x001cffff, 3, 0, 18 },<br>- // EHCI #1 0:1d.0<br>- Package() { 0x001dffff, 0, 0, 19 },<br>- // EHCI #2 0:1a.0<br>- Package() { 0x001affff, 0, 0, 21 },<br>- // LPC devices 0:1f.0<br>- Package() { 0x001fffff, 0, 0, 17 },<br>- Package() { 0x001fffff, 1, 0, 23 },<br>- Package() { 0x001fffff, 2, 0, 16 },<br>- Package() { 0x001fffff, 3, 0, 18 },<br>- })<br>- } Else {<br>- Return (Package() {<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // XHCI 0:14.0<br>- Package() { 0x0014ffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKE, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKC, 0 },<br>- // EHCI #1 0:1d.0<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // EHCI #2 0:1a.0<br>- Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKF, 0 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKH, 0 },<br>- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKC, 0 },<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/google/stout/dsdt.asl b/src/mainboard/google/stout/dsdt.asl<br>index 3a822ed..b12c963 100644<br>--- a/src/mainboard/google/stout/dsdt.asl<br>+++ b/src/mainboard/google/stout/dsdt.asl<br>@@ -44,7 +44,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include "acpi/sandybridge_pci_irqs.asl"<br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/hp/2570p/dsdt.asl b/src/mainboard/hp/2570p/dsdt.asl<br>index d4fab7a..51934c7 100644<br>--- a/src/mainboard/hp/2570p/dsdt.asl<br>+++ b/src/mainboard/hp/2570p/dsdt.asl<br>@@ -39,7 +39,6 @@<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> }<br> }<br> }<br>diff --git a/src/mainboard/hp/2760p/dsdt.asl b/src/mainboard/hp/2760p/dsdt.asl<br>index d4fab7a..51934c7 100644<br>--- a/src/mainboard/hp/2760p/dsdt.asl<br>+++ b/src/mainboard/hp/2760p/dsdt.asl<br>@@ -39,7 +39,6 @@<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> }<br> }<br> }<br>diff --git a/src/mainboard/hp/8460p/dsdt.asl b/src/mainboard/hp/8460p/dsdt.asl<br>index d4fab7a..51934c7 100644<br>--- a/src/mainboard/hp/8460p/dsdt.asl<br>+++ b/src/mainboard/hp/8460p/dsdt.asl<br>@@ -39,7 +39,6 @@<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> }<br> }<br> }<br>diff --git a/src/mainboard/hp/8470p/dsdt.asl b/src/mainboard/hp/8470p/dsdt.asl<br>index d4fab7a..51934c7 100644<br>--- a/src/mainboard/hp/8470p/dsdt.asl<br>+++ b/src/mainboard/hp/8470p/dsdt.asl<br>@@ -39,7 +39,6 @@<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> }<br> }<br> }<br>diff --git a/src/mainboard/intel/emeraldlake2/dsdt.asl b/src/mainboard/intel/emeraldlake2/dsdt.asl<br>index a31c415..4adc457 100644<br>--- a/src/mainboard/intel/emeraldlake2/dsdt.asl<br>+++ b/src/mainboard/intel/emeraldlake2/dsdt.asl<br>@@ -43,7 +43,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/kontron/ktqm77/dsdt.asl b/src/mainboard/kontron/ktqm77/dsdt.asl<br>index a5fd359..1b26ed0 100644<br>--- a/src/mainboard/kontron/ktqm77/dsdt.asl<br>+++ b/src/mainboard/kontron/ktqm77/dsdt.asl<br>@@ -44,7 +44,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/lenovo/l520/dsdt.asl b/src/mainboard/lenovo/l520/dsdt.asl<br>index 98afb23..5191c07 100644<br>--- a/src/mainboard/lenovo/l520/dsdt.asl<br>+++ b/src/mainboard/lenovo/l520/dsdt.asl<br>@@ -26,7 +26,6 @@<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> }<br> }<br> }<br>diff --git a/src/mainboard/lenovo/s230u/dsdt.asl b/src/mainboard/lenovo/s230u/dsdt.asl<br>index 6cf26fd..19818a2 100644<br>--- a/src/mainboard/lenovo/s230u/dsdt.asl<br>+++ b/src/mainboard/lenovo/s230u/dsdt.asl<br>@@ -24,7 +24,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br> }<br>diff --git a/src/mainboard/lenovo/t420/dsdt.asl b/src/mainboard/lenovo/t420/dsdt.asl<br>index 365fd0d..7db8344 100644<br>--- a/src/mainboard/lenovo/t420/dsdt.asl<br>+++ b/src/mainboard/lenovo/t420/dsdt.asl<br>@@ -45,7 +45,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/lenovo/t420s/dsdt.asl b/src/mainboard/lenovo/t420s/dsdt.asl<br>index f0c56c1..c549988 100644<br>--- a/src/mainboard/lenovo/t420s/dsdt.asl<br>+++ b/src/mainboard/lenovo/t420s/dsdt.asl<br>@@ -46,7 +46,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/lenovo/t430/dsdt.asl b/src/mainboard/lenovo/t430/dsdt.asl<br>index 638592d..dff8dcd 100644<br>--- a/src/mainboard/lenovo/t430/dsdt.asl<br>+++ b/src/mainboard/lenovo/t430/dsdt.asl<br>@@ -38,7 +38,6 @@<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> }<br> }<br> }<br>diff --git a/src/mainboard/lenovo/t430s/dsdt.asl b/src/mainboard/lenovo/t430s/dsdt.asl<br>index f0c56c1..c549988 100644<br>--- a/src/mainboard/lenovo/t430s/dsdt.asl<br>+++ b/src/mainboard/lenovo/t430s/dsdt.asl<br>@@ -46,7 +46,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/lenovo/t520/dsdt.asl b/src/mainboard/lenovo/t520/dsdt.asl<br>index 365fd0d..7db8344 100644<br>--- a/src/mainboard/lenovo/t520/dsdt.asl<br>+++ b/src/mainboard/lenovo/t520/dsdt.asl<br>@@ -45,7 +45,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/lenovo/t530/dsdt.asl b/src/mainboard/lenovo/t530/dsdt.asl<br>index 365fd0d..7db8344 100644<br>--- a/src/mainboard/lenovo/t530/dsdt.asl<br>+++ b/src/mainboard/lenovo/t530/dsdt.asl<br>@@ -45,7 +45,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl b/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl<br>index 8ad7ace..bb576f5 100644<br>--- a/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl<br>+++ b/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl<br>@@ -45,7 +45,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/lenovo/x201/dsdt.asl b/src/mainboard/lenovo/x201/dsdt.asl<br>index 92bc55a..b59c215 100644<br>--- a/src/mainboard/lenovo/x201/dsdt.asl<br>+++ b/src/mainboard/lenovo/x201/dsdt.asl<br>@@ -45,7 +45,6 @@<br> {<br> #include <northbridge/intel/nehalem/acpi/nehalem.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/lenovo/x220/dsdt.asl b/src/mainboard/lenovo/x220/dsdt.asl<br>index 365fd0d..7db8344 100644<br>--- a/src/mainboard/lenovo/x220/dsdt.asl<br>+++ b/src/mainboard/lenovo/x220/dsdt.asl<br>@@ -45,7 +45,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/lenovo/x230/dsdt.asl b/src/mainboard/lenovo/x230/dsdt.asl<br>index 365fd0d..7db8344 100644<br>--- a/src/mainboard/lenovo/x230/dsdt.asl<br>+++ b/src/mainboard/lenovo/x230/dsdt.asl<br>@@ -45,7 +45,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/packardbell/ms2290/dsdt.asl b/src/mainboard/packardbell/ms2290/dsdt.asl<br>index 36234b1..338ecca 100644<br>--- a/src/mainboard/packardbell/ms2290/dsdt.asl<br>+++ b/src/mainboard/packardbell/ms2290/dsdt.asl<br>@@ -39,7 +39,6 @@<br> {<br> #include <northbridge/intel/nehalem/acpi/nehalem.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/roda/rv11/dsdt.asl b/src/mainboard/roda/rv11/dsdt.asl<br>index 18fb1ca..4934eed 100644<br>--- a/src/mainboard/roda/rv11/dsdt.asl<br>+++ b/src/mainboard/roda/rv11/dsdt.asl<br>@@ -42,7 +42,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> <br> #include <acpi/brightness_levels.asl><br> }<br>diff --git a/src/mainboard/samsung/lumpy/acpi/sandybridge_pci_irqs.asl b/src/mainboard/samsung/lumpy/acpi/sandybridge_pci_irqs.asl<br>deleted file mode 100644<br>index 0b93cd6..0000000<br>--- a/src/mainboard/samsung/lumpy/acpi/sandybridge_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,64 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2007-2009 coresystems GmbH<br>- *<br>- * This program is free software; you can redistribute it and/or modify<br>- * it under the terms of the GNU General Public License as published by<br>- * the Free Software Foundation; version 2 of the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for Sandybridge */<br>-<br>-// PCI Interrupt Routing<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, 0, 16 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, 0, 22 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, 0, 17 },<br>- Package() { 0x001cffff, 1, 0, 18 },<br>- Package() { 0x001cffff, 2, 0, 19 },<br>- Package() { 0x001cffff, 3, 0, 16 },<br>- // EHCI #1 0:1d.0<br>- Package() { 0x001dffff, 0, 0, 19 },<br>- // EHCI #2 0:1a.0<br>- Package() { 0x001affff, 0, 0, 17 },<br>- // LPC devices 0:1f.0<br>- Package() { 0x001fffff, 0, 0, 16 },<br>- Package() { 0x001fffff, 1, 0, 22 },<br>- Package() { 0x001fffff, 2, 0, 23 },<br>- Package() { 0x001fffff, 3, 0, 17 },<br>- })<br>- } Else {<br>- Return (Package() {<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKE, 0 },<br>- // EHCI #1 0:1d.0<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // EHCI #2 0:1a.0<br>- Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKF, 0 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKG, 0 },<br>- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKH, 0 },<br>- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKB, 0 },<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/samsung/lumpy/dsdt.asl b/src/mainboard/samsung/lumpy/dsdt.asl<br>index 135919e..f42bec6 100644<br>--- a/src/mainboard/samsung/lumpy/dsdt.asl<br>+++ b/src/mainboard/samsung/lumpy/dsdt.asl<br>@@ -43,7 +43,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include "acpi/sandybridge_pci_irqs.asl"<br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/samsung/stumpy/acpi/sandybridge_pci_irqs.asl b/src/mainboard/samsung/stumpy/acpi/sandybridge_pci_irqs.asl<br>deleted file mode 100644<br>index fb9d5ad..0000000<br>--- a/src/mainboard/samsung/stumpy/acpi/sandybridge_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,64 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2007-2009 coresystems GmbH<br>- *<br>- * This program is free software; you can redistribute it and/or modify<br>- * it under the terms of the GNU General Public License as published by<br>- * the Free Software Foundation; version 2 of the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for Sandybridge */<br>-<br>-// PCI Interrupt Routing<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, 0, 16 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, 0, 22 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, 0, 17 },<br>- Package() { 0x001cffff, 1, 0, 18 },<br>- Package() { 0x001cffff, 2, 0, 19 },<br>- Package() { 0x001cffff, 3, 0, 20 },<br>- // EHCI #1 0:1d.0<br>- Package() { 0x001dffff, 0, 0, 19 },<br>- // EHCI #2 0:1a.0<br>- Package() { 0x001affff, 0, 0, 20 },<br>- // LPC devices 0:1f.0<br>- Package() { 0x001fffff, 0, 0, 21 },<br>- Package() { 0x001fffff, 1, 0, 22 },<br>- Package() { 0x001fffff, 2, 0, 23 },<br>- Package() { 0x001fffff, 3, 0, 16 },<br>- })<br>- } Else {<br>- Return (Package() {<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKE, 0 },<br>- // EHCI #1 0:1d.0<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // EHCI #2 0:1a.0<br>- Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKE, 0 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKF, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKG, 0 },<br>- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKH, 0 },<br>- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/samsung/stumpy/dsdt.asl b/src/mainboard/samsung/stumpy/dsdt.asl<br>index 3e13a41..c1ea0e6 100644<br>--- a/src/mainboard/samsung/stumpy/dsdt.asl<br>+++ b/src/mainboard/samsung/stumpy/dsdt.asl<br>@@ -44,7 +44,6 @@<br> {<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include "acpi/sandybridge_pci_irqs.asl"<br> <br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> }<br>diff --git a/src/mainboard/sapphire/pureplatinumh61/dsdt.asl b/src/mainboard/sapphire/pureplatinumh61/dsdt.asl<br>index eb98bb2..6247fe3 100644<br>--- a/src/mainboard/sapphire/pureplatinumh61/dsdt.asl<br>+++ b/src/mainboard/sapphire/pureplatinumh61/dsdt.asl<br>@@ -40,7 +40,6 @@<br> #include <northbridge/intel/sandybridge/acpi/sandybridge.asl><br> #include <drivers/intel/gma/acpi/default_brightness_levels.asl><br> #include <southbridge/intel/bd82x6x/acpi/pch.asl><br>- #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl><br> }<br> }<br> }<br>diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig<br>index fe1ca34..ed2b979 100644<br>--- a/src/southbridge/intel/bd82x6x/Kconfig<br>+++ b/src/southbridge/intel/bd82x6x/Kconfig<br>@@ -25,6 +25,7 @@<br> def_bool y<br> select ACPI_INTEL_HARDWARE_SLEEP_VALUES<br> select SOUTHBRIDGE_INTEL_COMMON<br>+ select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ<br> select SOUTHBRIDGE_INTEL_COMMON_SMBUS<br> select SOUTHBRIDGE_INTEL_COMMON_SPI<br> select IOAPIC<br>diff --git a/src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl b/src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl<br>deleted file mode 100644<br>index 0e6f960..0000000<br>--- a/src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl<br>+++ /dev/null<br>@@ -1,77 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2007-2009 coresystems GmbH<br>- *<br>- * This program is free software; you can redistribute it and/or<br>- * modify it under the terms of the GNU General Public License as<br>- * published by the Free Software Foundation; version 2 of<br>- * the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* PCI Interrupt Routing */<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- /* Onboard graphics (IGD) 0:2.0 */<br>- Package() { 0x0002ffff, 0, 0, 16 },/* GFX INTA -> PIRQA (MSI) */<br>- /* PCI Express Graphics (PEG) 0:1.0 */<br>- Package() { 0x0001ffff, 0, 0, 16 },/* GFX PCIe INTA -> PIRQA (MSI) */<br>- Package() { 0x0001ffff, 0, 0, 17 },/* GFX PCIe INTB -> PIRQB (MSI) */<br>- Package() { 0x0001ffff, 0, 0, 18 },/* GFX PCIe INTC -> PIRQC (MSI) */<br>- Package() { 0x0001ffff, 0, 0, 19 },/* GFX PCIe INTD -> PIRQD (MSI) */<br>- /* XHCI 0:14.0 (ivy only) */<br>- Package() { 0x0014ffff, 0, 0, 19 },<br>- /* High Definition Audio 0:1b.0 */<br>- Package() { 0x001bffff, 0, 0, 16 },/* D27IP_ZIP HDA INTA -> PIRQA (MSI) */<br>- /* PCIe Root Ports 0:1c.x */<br>- Package() { 0x001cffff, 0, 0, 17 },/* D28IP_P1IP PCIe INTA -> PIRQB */<br>- Package() { 0x001cffff, 1, 0, 21 },/* D28IP_P2IP PCIe INTB -> PIRQF */<br>- Package() { 0x001cffff, 2, 0, 19 },/* D28IP_P3IP PCIe INTC -> PIRQD */<br>- Package() { 0x001cffff, 3, 0, 20 },/* D28IP_P3IP PCIe INTD -> PIRQE */<br>- /* EHCI #1 0:1d.0 */<br>- Package() { 0x001dffff, 0, 0, 19 },/* D29IP_E1P EHCI1 INTA -> PIRQD */<br>- /* EHCI #2 0:1a.0 */<br>- Package() { 0x001affff, 0, 0, 21 },/* D26IP_E2P EHCI2 INTA -> PIRQF */<br>- /* LPC devices 0:1f.0 */<br>- Package() { 0x001fffff, 0, 0, 17 }, /* D31IP_SIP SATA INTA -> PIRQB (MSI) */<br>- Package() { 0x001fffff, 1, 0, 23 }, /* D31IP_SMIP SMBUS INTB -> PIRQH */<br>- Package() { 0x001fffff, 2, 0, 16 }, /* D31IP_TTIP THRT INTC -> PIRQA */<br>- Package() { 0x001fffff, 3, 0, 18 },<br>- })<br>- } Else {<br>- Return (Package() {<br>- /* Onboard graphics (IGD) 0:2.0 */<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- /* PCI Express Graphics (PEG) 0:1.0 */<br>- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },<br>- /* XHCI 0:14.0 (ivy only) */<br>- Package() { 0x0014ffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },<br>- /* High Definition Audio 0:1b.0 */<br>- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- /* PCIe Root Ports 0:1c.x */<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKF, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKE, 0 },<br>- /* EHCI #1 0:1d.0 */<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },<br>- /* EHCI #2 0:1a.0 */<br>- Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKF, 0 },<br>- /* LPC device 0:1f.0 */<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKH, 0 },<br>- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKC, 0 },<br>- })<br>- }<br>-}<br>diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c<br>index 2bfc1e3..7f61669 100644<br>--- a/src/southbridge/intel/bd82x6x/lpc.c<br>+++ b/src/southbridge/intel/bd82x6x/lpc.c<br>@@ -35,6 +35,7 @@<br> #include "pch.h"<br> #include "nvs.h"<br> #include <southbridge/intel/common/pciehp.h><br>+#include <southbridge/intel/common/acpi_pirq_gen.h><br> <br> #define NMI_OFF 0<br> <br>@@ -821,6 +822,7 @@<br> config_t *chip = dev->chip_info;<br> <br> intel_acpi_pcie_hotplug_generator(chip->pcie_hotplug_map, 8);<br>+ intel_acpi_gen_def_acpi_pirq(dev);<br> }<br> <br> static void lpc_final(struct device *dev)<br></pre><p>To view, visit <a href="https://review.coreboot.org/22859">change 22859</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22859"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I832a86925283d61b64b8268246d9e6f11994c120 </div>
<div style="display:none"> Gerrit-Change-Number: 22859 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Tobias Diedrich <ranma+coreboot@tdiedrich.de> </div>