<p>Marshall Dawson has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22846">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">amd/common/psp: Enable PSP command register once<br><br>Reduce the number of times the PSP's bus-mastering and memory<br>access is enabled.  Only write the command register once per stage<br>and leave it enabled.<br><br>Change-Id: I7e29a3935df94d16de90b28ff78449d23fe01666<br>Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com><br>---<br>M src/soc/amd/common/block/psp/psp.c<br>1 file changed, 32 insertions(+), 35 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/22846/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/soc/amd/common/block/psp/psp.c b/src/soc/amd/common/block/psp/psp.c<br>index 5aedfc1..c1174bc 100644<br>--- a/src/soc/amd/common/block/psp/psp.c<br>+++ b/src/soc/amd/common/block/psp/psp.c<br>@@ -14,6 +14,7 @@<br>  */<br> <br> #include <arch/io.h><br>+#include <arch/early_variables.h><br> #include <cbfs.h><br> #include <region_file.h><br> #include <timer.h><br>@@ -49,6 +50,20 @@<br>         }<br> }<br> <br>+static int master_enabled CAR_GLOBAL = 0;<br>+<br>+static void enable_master(void)<br>+{<br>+        u32 command_reg;<br>+<br>+  if (!master_enabled) {<br>+               command_reg = pci_read_config32(SOC_PSP_DEV, PCI_COMMAND);<br>+           command_reg |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;<br>+              pci_write_config32(SOC_PSP_DEV, PCI_COMMAND, command_reg);<br>+           master_enabled = 1;<br>+  }<br>+}<br>+<br> static struct psp_mbox *get_mbox_address(void)<br> {<br>         UINT32 base; /* UINT32 for compatibility with PspBaseLib */<br>@@ -63,6 +78,7 @@<br>        if (!bar3_status)<br>             return NULL;<br> <br>+      enable_master();<br>      baseptr = base;<br>       return (struct psp_mbox *)(baseptr + PSP_MAILBOX_BASE);<br> }<br>@@ -122,56 +138,37 @@<br> <br> static int send_psp_command(u32 command, void *buffer)<br> {<br>-   u32 command_reg;<br>-     int status = 0;<br>-<br>    struct psp_mbox *mbox = get_mbox_address();<br>   if (!mbox)<br>            return -PSPSTS_NOBASE;<br> <br>-    command_reg = pci_read_config32(SOC_PSP_DEV, PCI_COMMAND);<br>-   pci_write_config32(SOC_PSP_DEV, PCI_COMMAND, command_reg |<br>-                           PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);<br>-<br>  /* check for PSP error conditions */<br>- if (rd_mbox_sts(mbox) & STATUS_HALT) {<br>-           status = -PSPSTS_HALTED;<br>-             goto exit;<br>-   }<br>-    if (rd_mbox_sts(mbox) & STATUS_RECOVERY) {<br>-               status = -PSPSTS_RECOVERY;<br>-           goto exit;<br>-   }<br>+    if (rd_mbox_sts(mbox) & STATUS_HALT)<br>+             return -PSPSTS_HALTED;<br>+<br>+    if (rd_mbox_sts(mbox) & STATUS_RECOVERY)<br>+         return -PSPSTS_RECOVERY;<br> <br>   /* PSP must be finished with init and ready to accept a command */<br>-   if (wait_initialized(mbox)) {<br>-                status = -PSPSTS_INIT_TIMEOUT;<br>-               goto exit;<br>-   }<br>-    if (wait_command(mbox)) {<br>-            status = -PSPSTS_CMD_TIMEOUT;<br>-                goto exit;<br>-   }<br>+    if (wait_initialized(mbox))<br>+          return -PSPSTS_INIT_TIMEOUT;<br>+<br>+      if (wait_command(mbox))<br>+              return -PSPSTS_CMD_TIMEOUT;<br> <br>        /* set address of command-response buffer and write command register */<br>       wr_mbox_cmd_resp(mbox, buffer);<br>       wr_mbox_cmd(mbox, command);<br> <br>        /* PSP clears command register when complete */<br>-      if (wait_command(mbox)) {<br>-            status = -PSPSTS_CMD_TIMEOUT;<br>-                goto exit;<br>-   }<br>+    if (wait_command(mbox))<br>+              return -PSPSTS_CMD_TIMEOUT;<br> <br>        /* check delivery status */<br>-  if (rd_mbox_sts(mbox) & (STATUS_ERROR | STATUS_TERMINATED)) {<br>-            status = -PSPSTS_SEND_ERROR;<br>-         goto exit;<br>-   }<br>-exit:<br>-    /* restore command register to original value */<br>-     pci_write_config32(SOC_PSP_DEV, PCI_COMMAND, command_reg);<br>-   return status;<br>+       if (rd_mbox_sts(mbox) & (STATUS_ERROR | STATUS_TERMINATED))<br>+              return -PSPSTS_SEND_ERROR;<br>+<br>+        return 0;<br> }<br> <br> /*<br></pre><p>To view, visit <a href="https://review.coreboot.org/22846">change 22846</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22846"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I7e29a3935df94d16de90b28ff78449d23fe01666 </div>
<div style="display:none"> Gerrit-Change-Number: 22846 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marshall Dawson <marshalldawson3rd@gmail.com> </div>