<p>Iru Cai has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22842">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/hp: Add CMOS support for all HP Elitebook models<br><br>Change-Id: I0a50a25798fd31b7acccf9872c50dac2718ce895<br>Signed-off-by: Iru Cai <mytbk920423@gmail.com><br>---<br>M src/mainboard/hp/2570p/Kconfig<br>A src/mainboard/hp/2570p/cmos.default<br>A src/mainboard/hp/2570p/cmos.layout<br>M src/mainboard/hp/2760p/Kconfig<br>A src/mainboard/hp/2760p/cmos.default<br>A src/mainboard/hp/2760p/cmos.layout<br>M src/mainboard/hp/8460p/Kconfig<br>A src/mainboard/hp/8460p/cmos.default<br>A src/mainboard/hp/8460p/cmos.layout<br>M src/mainboard/hp/8470p/Kconfig<br>A src/mainboard/hp/8470p/cmos.default<br>A src/mainboard/hp/8470p/cmos.layout<br>12 files changed, 496 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/22842/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/mainboard/hp/2570p/Kconfig b/src/mainboard/hp/2570p/Kconfig<br>index 229c16a..dc9588b 100644<br>--- a/src/mainboard/hp/2570p/Kconfig<br>+++ b/src/mainboard/hp/2570p/Kconfig<br>@@ -31,6 +31,8 @@<br> select EC_HP_KBC1126<br> select MAINBOARD_HAS_LIBGFXINIT<br> select GFX_GMA_INTERNAL_IS_LVDS<br>+ select HAVE_OPTION_TABLE<br>+ select HAVE_CMOS_DEFAULT<br> <br> config HAVE_IFD_BIN<br> bool<br>diff --git a/src/mainboard/hp/2570p/cmos.default b/src/mainboard/hp/2570p/cmos.default<br>new file mode 100644<br>index 0000000..fcbe0fb<br>--- /dev/null<br>+++ b/src/mainboard/hp/2570p/cmos.default<br>@@ -0,0 +1,6 @@<br>+boot_option=Fallback<br>+debug_level=Spew<br>+power_on_after_fail=Disable<br>+nmi=Enable<br>+volume=0x3<br>+sata_mode=AHCI<br>diff --git a/src/mainboard/hp/2570p/cmos.layout b/src/mainboard/hp/2570p/cmos.layout<br>new file mode 100644<br>index 0000000..720402f<br>--- /dev/null<br>+++ b/src/mainboard/hp/2570p/cmos.layout<br>@@ -0,0 +1,116 @@<br>+##<br>+## This file is part of the coreboot project.<br>+##<br>+## Copyright (C) 2007-2008 coresystems GmbH<br>+## Copyright (C) 2014 Vladimir Serbinenko<br>+##<br>+## This program is free software; you can redistribute it and/or modify<br>+## it under the terms of the GNU General Public License as published by<br>+## the Free Software Foundation; version 2 of the License.<br>+##<br>+## This program is distributed in the hope that it will be useful,<br>+## but WITHOUT ANY WARRANTY; without even the implied warranty of<br>+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>+## GNU General Public License for more details.<br>+##<br>+<br>+# -----------------------------------------------------------------<br>+entries<br>+<br>+# -----------------------------------------------------------------<br>+# Status Register A<br>+# -----------------------------------------------------------------<br>+# Status Register B<br>+# -----------------------------------------------------------------<br>+# Status Register C<br>+#96 4 r 0 status_c_rsvd<br>+#100 1 r 0 uf_flag<br>+#101 1 r 0 af_flag<br>+#102 1 r 0 pf_flag<br>+#103 1 r 0 irqf_flag<br>+# -----------------------------------------------------------------<br>+# Status Register D<br>+#104 7 r 0 status_d_rsvd<br>+#111 1 r 0 valid_cmos_ram<br>+# -----------------------------------------------------------------<br>+# Diagnostic Status Register<br>+#112 8 r 0 diag_rsvd1<br>+<br>+# -----------------------------------------------------------------<br>+0 120 r 0 reserved_memory<br>+#120 264 r 0 unused<br>+<br>+# -----------------------------------------------------------------<br>+# RTC_BOOT_BYTE (coreboot hardcoded)<br>+384 1 e 4 boot_option<br>+388 4 h 0 reboot_counter<br>+#390 2 r 0 unused?<br>+<br>+# -----------------------------------------------------------------<br>+# coreboot config options: console<br>+#392 3 r 0 unused<br>+395 4 e 6 debug_level<br>+#399 1 r 0 unused<br>+<br>+#400 8 r 0 reserved for century byte<br>+<br>+# coreboot config options: southbridge<br>+408 1 e 1 nmi<br>+409 2 e 7 power_on_after_fail<br>+<br>+421 1 e 9 sata_mode<br>+<br>+# coreboot config options: cpu<br>+#424 8 r 0 unused<br>+<br>+# coreboot config options: northbridge<br>+432 3 e 11 gfx_uma_size<br>+#435 5 r 0 unused<br>+<br>+440 8 h 0 volume<br>+<br>+# SandyBridge MRC Scrambler Seed values<br>+896 32 r 0 mrc_scrambler_seed<br>+928 32 r 0 mrc_scrambler_seed_s3<br>+960 16 r 0 mrc_scrambler_seed_chk<br>+<br>+# coreboot config options: check sums<br>+984 16 h 0 check_sum<br>+<br>+# -----------------------------------------------------------------<br>+<br>+enumerations<br>+<br>+#ID value text<br>+1 0 Disable<br>+1 1 Enable<br>+2 0 Enable<br>+2 1 Disable<br>+4 0 Fallback<br>+4 1 Normal<br>+6 1 Emergency<br>+6 2 Alert<br>+6 3 Critical<br>+6 4 Error<br>+6 5 Warning<br>+6 6 Notice<br>+6 7 Info<br>+6 8 Debug<br>+6 9 Spew<br>+7 0 Disable<br>+7 1 Enable<br>+7 2 Keep<br>+9 0 AHCI<br>+9 1 Compatible<br>+11 0 32M<br>+11 1 64M<br>+11 2 96M<br>+11 3 128M<br>+11 4 160M<br>+11 5 192M<br>+11 6 224M<br>+<br>+# -----------------------------------------------------------------<br>+checksums<br>+<br>+checksum 392 447 984<br>diff --git a/src/mainboard/hp/2760p/Kconfig b/src/mainboard/hp/2760p/Kconfig<br>index 8a0889e..7adf209 100644<br>--- a/src/mainboard/hp/2760p/Kconfig<br>+++ b/src/mainboard/hp/2760p/Kconfig<br>@@ -31,6 +31,8 @@<br> select EC_HP_KBC1126<br> select MAINBOARD_HAS_LIBGFXINIT<br> select GFX_GMA_INTERNAL_IS_LVDS<br>+ select HAVE_OPTION_TABLE<br>+ select HAVE_CMOS_DEFAULT<br> <br> config HAVE_IFD_BIN<br> bool<br>diff --git a/src/mainboard/hp/2760p/cmos.default b/src/mainboard/hp/2760p/cmos.default<br>new file mode 100644<br>index 0000000..fcbe0fb<br>--- /dev/null<br>+++ b/src/mainboard/hp/2760p/cmos.default<br>@@ -0,0 +1,6 @@<br>+boot_option=Fallback<br>+debug_level=Spew<br>+power_on_after_fail=Disable<br>+nmi=Enable<br>+volume=0x3<br>+sata_mode=AHCI<br>diff --git a/src/mainboard/hp/2760p/cmos.layout b/src/mainboard/hp/2760p/cmos.layout<br>new file mode 100644<br>index 0000000..720402f<br>--- /dev/null<br>+++ b/src/mainboard/hp/2760p/cmos.layout<br>@@ -0,0 +1,116 @@<br>+##<br>+## This file is part of the coreboot project.<br>+##<br>+## Copyright (C) 2007-2008 coresystems GmbH<br>+## Copyright (C) 2014 Vladimir Serbinenko<br>+##<br>+## This program is free software; you can redistribute it and/or modify<br>+## it under the terms of the GNU General Public License as published by<br>+## the Free Software Foundation; version 2 of the License.<br>+##<br>+## This program is distributed in the hope that it will be useful,<br>+## but WITHOUT ANY WARRANTY; without even the implied warranty of<br>+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>+## GNU General Public License for more details.<br>+##<br>+<br>+# -----------------------------------------------------------------<br>+entries<br>+<br>+# -----------------------------------------------------------------<br>+# Status Register A<br>+# -----------------------------------------------------------------<br>+# Status Register B<br>+# -----------------------------------------------------------------<br>+# Status Register C<br>+#96 4 r 0 status_c_rsvd<br>+#100 1 r 0 uf_flag<br>+#101 1 r 0 af_flag<br>+#102 1 r 0 pf_flag<br>+#103 1 r 0 irqf_flag<br>+# -----------------------------------------------------------------<br>+# Status Register D<br>+#104 7 r 0 status_d_rsvd<br>+#111 1 r 0 valid_cmos_ram<br>+# -----------------------------------------------------------------<br>+# Diagnostic Status Register<br>+#112 8 r 0 diag_rsvd1<br>+<br>+# -----------------------------------------------------------------<br>+0 120 r 0 reserved_memory<br>+#120 264 r 0 unused<br>+<br>+# -----------------------------------------------------------------<br>+# RTC_BOOT_BYTE (coreboot hardcoded)<br>+384 1 e 4 boot_option<br>+388 4 h 0 reboot_counter<br>+#390 2 r 0 unused?<br>+<br>+# -----------------------------------------------------------------<br>+# coreboot config options: console<br>+#392 3 r 0 unused<br>+395 4 e 6 debug_level<br>+#399 1 r 0 unused<br>+<br>+#400 8 r 0 reserved for century byte<br>+<br>+# coreboot config options: southbridge<br>+408 1 e 1 nmi<br>+409 2 e 7 power_on_after_fail<br>+<br>+421 1 e 9 sata_mode<br>+<br>+# coreboot config options: cpu<br>+#424 8 r 0 unused<br>+<br>+# coreboot config options: northbridge<br>+432 3 e 11 gfx_uma_size<br>+#435 5 r 0 unused<br>+<br>+440 8 h 0 volume<br>+<br>+# SandyBridge MRC Scrambler Seed values<br>+896 32 r 0 mrc_scrambler_seed<br>+928 32 r 0 mrc_scrambler_seed_s3<br>+960 16 r 0 mrc_scrambler_seed_chk<br>+<br>+# coreboot config options: check sums<br>+984 16 h 0 check_sum<br>+<br>+# -----------------------------------------------------------------<br>+<br>+enumerations<br>+<br>+#ID value text<br>+1 0 Disable<br>+1 1 Enable<br>+2 0 Enable<br>+2 1 Disable<br>+4 0 Fallback<br>+4 1 Normal<br>+6 1 Emergency<br>+6 2 Alert<br>+6 3 Critical<br>+6 4 Error<br>+6 5 Warning<br>+6 6 Notice<br>+6 7 Info<br>+6 8 Debug<br>+6 9 Spew<br>+7 0 Disable<br>+7 1 Enable<br>+7 2 Keep<br>+9 0 AHCI<br>+9 1 Compatible<br>+11 0 32M<br>+11 1 64M<br>+11 2 96M<br>+11 3 128M<br>+11 4 160M<br>+11 5 192M<br>+11 6 224M<br>+<br>+# -----------------------------------------------------------------<br>+checksums<br>+<br>+checksum 392 447 984<br>diff --git a/src/mainboard/hp/8460p/Kconfig b/src/mainboard/hp/8460p/Kconfig<br>index 6a035ae..3682ce3 100644<br>--- a/src/mainboard/hp/8460p/Kconfig<br>+++ b/src/mainboard/hp/8460p/Kconfig<br>@@ -32,6 +32,8 @@<br> select GFX_GMA_INTERNAL_IS_LVDS<br> select EC_HP_KBC1126<br> select SUPERIO_SMSC_LPC47N217<br>+ select HAVE_OPTION_TABLE<br>+ select HAVE_CMOS_DEFAULT<br> <br> config HAVE_IFD_BIN<br> bool<br>diff --git a/src/mainboard/hp/8460p/cmos.default b/src/mainboard/hp/8460p/cmos.default<br>new file mode 100644<br>index 0000000..fcbe0fb<br>--- /dev/null<br>+++ b/src/mainboard/hp/8460p/cmos.default<br>@@ -0,0 +1,6 @@<br>+boot_option=Fallback<br>+debug_level=Spew<br>+power_on_after_fail=Disable<br>+nmi=Enable<br>+volume=0x3<br>+sata_mode=AHCI<br>diff --git a/src/mainboard/hp/8460p/cmos.layout b/src/mainboard/hp/8460p/cmos.layout<br>new file mode 100644<br>index 0000000..720402f<br>--- /dev/null<br>+++ b/src/mainboard/hp/8460p/cmos.layout<br>@@ -0,0 +1,116 @@<br>+##<br>+## This file is part of the coreboot project.<br>+##<br>+## Copyright (C) 2007-2008 coresystems GmbH<br>+## Copyright (C) 2014 Vladimir Serbinenko<br>+##<br>+## This program is free software; you can redistribute it and/or modify<br>+## it under the terms of the GNU General Public License as published by<br>+## the Free Software Foundation; version 2 of the License.<br>+##<br>+## This program is distributed in the hope that it will be useful,<br>+## but WITHOUT ANY WARRANTY; without even the implied warranty of<br>+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>+## GNU General Public License for more details.<br>+##<br>+<br>+# -----------------------------------------------------------------<br>+entries<br>+<br>+# -----------------------------------------------------------------<br>+# Status Register A<br>+# -----------------------------------------------------------------<br>+# Status Register B<br>+# -----------------------------------------------------------------<br>+# Status Register C<br>+#96 4 r 0 status_c_rsvd<br>+#100 1 r 0 uf_flag<br>+#101 1 r 0 af_flag<br>+#102 1 r 0 pf_flag<br>+#103 1 r 0 irqf_flag<br>+# -----------------------------------------------------------------<br>+# Status Register D<br>+#104 7 r 0 status_d_rsvd<br>+#111 1 r 0 valid_cmos_ram<br>+# -----------------------------------------------------------------<br>+# Diagnostic Status Register<br>+#112 8 r 0 diag_rsvd1<br>+<br>+# -----------------------------------------------------------------<br>+0 120 r 0 reserved_memory<br>+#120 264 r 0 unused<br>+<br>+# -----------------------------------------------------------------<br>+# RTC_BOOT_BYTE (coreboot hardcoded)<br>+384 1 e 4 boot_option<br>+388 4 h 0 reboot_counter<br>+#390 2 r 0 unused?<br>+<br>+# -----------------------------------------------------------------<br>+# coreboot config options: console<br>+#392 3 r 0 unused<br>+395 4 e 6 debug_level<br>+#399 1 r 0 unused<br>+<br>+#400 8 r 0 reserved for century byte<br>+<br>+# coreboot config options: southbridge<br>+408 1 e 1 nmi<br>+409 2 e 7 power_on_after_fail<br>+<br>+421 1 e 9 sata_mode<br>+<br>+# coreboot config options: cpu<br>+#424 8 r 0 unused<br>+<br>+# coreboot config options: northbridge<br>+432 3 e 11 gfx_uma_size<br>+#435 5 r 0 unused<br>+<br>+440 8 h 0 volume<br>+<br>+# SandyBridge MRC Scrambler Seed values<br>+896 32 r 0 mrc_scrambler_seed<br>+928 32 r 0 mrc_scrambler_seed_s3<br>+960 16 r 0 mrc_scrambler_seed_chk<br>+<br>+# coreboot config options: check sums<br>+984 16 h 0 check_sum<br>+<br>+# -----------------------------------------------------------------<br>+<br>+enumerations<br>+<br>+#ID value text<br>+1 0 Disable<br>+1 1 Enable<br>+2 0 Enable<br>+2 1 Disable<br>+4 0 Fallback<br>+4 1 Normal<br>+6 1 Emergency<br>+6 2 Alert<br>+6 3 Critical<br>+6 4 Error<br>+6 5 Warning<br>+6 6 Notice<br>+6 7 Info<br>+6 8 Debug<br>+6 9 Spew<br>+7 0 Disable<br>+7 1 Enable<br>+7 2 Keep<br>+9 0 AHCI<br>+9 1 Compatible<br>+11 0 32M<br>+11 1 64M<br>+11 2 96M<br>+11 3 128M<br>+11 4 160M<br>+11 5 192M<br>+11 6 224M<br>+<br>+# -----------------------------------------------------------------<br>+checksums<br>+<br>+checksum 392 447 984<br>diff --git a/src/mainboard/hp/8470p/Kconfig b/src/mainboard/hp/8470p/Kconfig<br>index 603d957..2157867 100644<br>--- a/src/mainboard/hp/8470p/Kconfig<br>+++ b/src/mainboard/hp/8470p/Kconfig<br>@@ -32,6 +32,8 @@<br> select GFX_GMA_INTERNAL_IS_LVDS<br> select EC_HP_KBC1126<br> select SUPERIO_SMSC_LPC47N217<br>+ select HAVE_OPTION_TABLE<br>+ select HAVE_CMOS_DEFAULT<br> <br> config HAVE_IFD_BIN<br> bool<br>diff --git a/src/mainboard/hp/8470p/cmos.default b/src/mainboard/hp/8470p/cmos.default<br>new file mode 100644<br>index 0000000..fcbe0fb<br>--- /dev/null<br>+++ b/src/mainboard/hp/8470p/cmos.default<br>@@ -0,0 +1,6 @@<br>+boot_option=Fallback<br>+debug_level=Spew<br>+power_on_after_fail=Disable<br>+nmi=Enable<br>+volume=0x3<br>+sata_mode=AHCI<br>diff --git a/src/mainboard/hp/8470p/cmos.layout b/src/mainboard/hp/8470p/cmos.layout<br>new file mode 100644<br>index 0000000..720402f<br>--- /dev/null<br>+++ b/src/mainboard/hp/8470p/cmos.layout<br>@@ -0,0 +1,116 @@<br>+##<br>+## This file is part of the coreboot project.<br>+##<br>+## Copyright (C) 2007-2008 coresystems GmbH<br>+## Copyright (C) 2014 Vladimir Serbinenko<br>+##<br>+## This program is free software; you can redistribute it and/or modify<br>+## it under the terms of the GNU General Public License as published by<br>+## the Free Software Foundation; version 2 of the License.<br>+##<br>+## This program is distributed in the hope that it will be useful,<br>+## but WITHOUT ANY WARRANTY; without even the implied warranty of<br>+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>+## GNU General Public License for more details.<br>+##<br>+<br>+# -----------------------------------------------------------------<br>+entries<br>+<br>+# -----------------------------------------------------------------<br>+# Status Register A<br>+# -----------------------------------------------------------------<br>+# Status Register B<br>+# -----------------------------------------------------------------<br>+# Status Register C<br>+#96 4 r 0 status_c_rsvd<br>+#100 1 r 0 uf_flag<br>+#101 1 r 0 af_flag<br>+#102 1 r 0 pf_flag<br>+#103 1 r 0 irqf_flag<br>+# -----------------------------------------------------------------<br>+# Status Register D<br>+#104 7 r 0 status_d_rsvd<br>+#111 1 r 0 valid_cmos_ram<br>+# -----------------------------------------------------------------<br>+# Diagnostic Status Register<br>+#112 8 r 0 diag_rsvd1<br>+<br>+# -----------------------------------------------------------------<br>+0 120 r 0 reserved_memory<br>+#120 264 r 0 unused<br>+<br>+# -----------------------------------------------------------------<br>+# RTC_BOOT_BYTE (coreboot hardcoded)<br>+384 1 e 4 boot_option<br>+388 4 h 0 reboot_counter<br>+#390 2 r 0 unused?<br>+<br>+# -----------------------------------------------------------------<br>+# coreboot config options: console<br>+#392 3 r 0 unused<br>+395 4 e 6 debug_level<br>+#399 1 r 0 unused<br>+<br>+#400 8 r 0 reserved for century byte<br>+<br>+# coreboot config options: southbridge<br>+408 1 e 1 nmi<br>+409 2 e 7 power_on_after_fail<br>+<br>+421 1 e 9 sata_mode<br>+<br>+# coreboot config options: cpu<br>+#424 8 r 0 unused<br>+<br>+# coreboot config options: northbridge<br>+432 3 e 11 gfx_uma_size<br>+#435 5 r 0 unused<br>+<br>+440 8 h 0 volume<br>+<br>+# SandyBridge MRC Scrambler Seed values<br>+896 32 r 0 mrc_scrambler_seed<br>+928 32 r 0 mrc_scrambler_seed_s3<br>+960 16 r 0 mrc_scrambler_seed_chk<br>+<br>+# coreboot config options: check sums<br>+984 16 h 0 check_sum<br>+<br>+# -----------------------------------------------------------------<br>+<br>+enumerations<br>+<br>+#ID value text<br>+1 0 Disable<br>+1 1 Enable<br>+2 0 Enable<br>+2 1 Disable<br>+4 0 Fallback<br>+4 1 Normal<br>+6 1 Emergency<br>+6 2 Alert<br>+6 3 Critical<br>+6 4 Error<br>+6 5 Warning<br>+6 6 Notice<br>+6 7 Info<br>+6 8 Debug<br>+6 9 Spew<br>+7 0 Disable<br>+7 1 Enable<br>+7 2 Keep<br>+9 0 AHCI<br>+9 1 Compatible<br>+11 0 32M<br>+11 1 64M<br>+11 2 96M<br>+11 3 128M<br>+11 4 160M<br>+11 5 192M<br>+11 6 224M<br>+<br>+# -----------------------------------------------------------------<br>+checksums<br>+<br>+checksum 392 447 984<br></pre><p>To view, visit <a href="https://review.coreboot.org/22842">change 22842</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22842"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I0a50a25798fd31b7acccf9872c50dac2718ce895 </div>
<div style="display:none"> Gerrit-Change-Number: 22842 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Iru Cai <mytbk920423@gmail.com> </div>