<p>Tobias Diedrich has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22836">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">intel/dcp847ske: Enable RAM voltage setting<br><br>Use the hooks introduced in https://review.coreboot.org/#/c/22806/ to<br>enable setting the RAM voltage before RAM training.<br><br>Change-Id: Ib0e2b4e90b5eda2da14834f4721649fd77ec1025<br>Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de><br>---<br>M src/mainboard/intel/dcp847ske/romstage.c<br>1 file changed, 18 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/22836/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/mainboard/intel/dcp847ske/romstage.c b/src/mainboard/intel/dcp847ske/romstage.c<br>index ad31bba..98bc6dd 100644<br>--- a/src/mainboard/intel/dcp847ske/romstage.c<br>+++ b/src/mainboard/intel/dcp847ske/romstage.c<br>@@ -16,7 +16,9 @@<br>  * GNU General Public License for more details.<br>  */<br> <br>+#include <console/console.h><br> #include <stdint.h><br>+#include <southbridge/intel/common/gpio.h><br> #include <northbridge/intel/sandybridge/sandybridge.h><br> #if IS_ENABLED(CONFIG_USE_NATIVE_RAMINIT)<br> #include <northbridge/intel/sandybridge/raminit_native.h><br>@@ -24,7 +26,22 @@<br> #include <northbridge/intel/sandybridge/raminit.h><br> #endif<br> <br>-#if !IS_ENABLED(CONFIG_USE_NATIVE_RAMINIT)<br>+#if IS_ENABLED(CONFIG_USE_NATIVE_RAMINIT)<br>+void mainboard_supported_dram_voltage(dimm_voltage_t *voltage)<br>+{<br>+        voltage->min_millivolts = 1350;<br>+   voltage->max_millivolts = 1500;<br>+}<br>+<br>+void mainboard_set_dram_voltage(const u16 voltage)<br>+{<br>+   if (voltage < 1500) {<br>+             // GPIO8 default from gpio.c is LOW (1.5V).<br>+          // Set to HIGH to lower ram voltage to 1.35V.<br>+                set_gpio(8, 1);<br>+      }<br>+}<br>+#else<br> void mainboard_fill_pei_data(struct pei_data *pei_data)<br> {<br>   struct pei_data pei_data_template = {<br></pre><p>To view, visit <a href="https://review.coreboot.org/22836">change 22836</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22836"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ib0e2b4e90b5eda2da14834f4721649fd77ec1025 </div>
<div style="display:none"> Gerrit-Change-Number: 22836 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Tobias Diedrich <ranma+coreboot@tdiedrich.de> </div>