<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/22805">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sb/intel/i82801gx: Use common ACPI PIRQ function<br><br>Not yet tested.<br><br>Change-Id: I456dca61419be9f2efd06fa966343a4b5ad6d5c6<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>D src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl<br>M src/mainboard/apple/macbook21/romstage.c<br>M src/mainboard/asrock/g41c-gs/romstage.c<br>D src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl<br>D src/mainboard/foxconn/g41s-k/acpi/x4x_pci_irqs.asl<br>M src/mainboard/foxconn/g41s-k/romstage.c<br>D src/mainboard/getac/p470/acpi/i945_pci_irqs.asl<br>M src/mainboard/getac/p470/romstage.c<br>D src/mainboard/gigabyte/ga-945gcm-s2l/acpi/i945_pci_irqs.asl<br>D src/mainboard/gigabyte/ga-g41m-es2l/acpi/x4x_pci_irqs.asl<br>M src/mainboard/gigabyte/ga-g41m-es2l/romstage.c<br>D src/mainboard/ibase/mb899/acpi/i945_pci_irqs.asl<br>M src/mainboard/ibase/mb899/romstage.c<br>D src/mainboard/intel/d510mo/acpi/pineview_pci_irqs.asl<br>M src/mainboard/intel/d510mo/romstage.c<br>D src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl<br>M src/mainboard/intel/d945gclf/romstage.c<br>D src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl<br>M src/mainboard/kontron/986lcd-m/romstage.c<br>D src/mainboard/lenovo/t60/acpi/i945_pci_irqs.asl<br>M src/mainboard/lenovo/t60/romstage.c<br>D src/mainboard/lenovo/x60/acpi/i945_pci_irqs.asl<br>M src/mainboard/lenovo/x60/romstage.c<br>D src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl<br>M src/mainboard/roda/rk886ex/romstage.c<br>M src/northbridge/intel/i945/acpi/hostbridge.asl<br>M src/northbridge/intel/pineview/acpi/hostbridge.asl<br>M src/southbridge/intel/i82801gx/Kconfig<br>M src/southbridge/intel/i82801gx/lpc.c<br>29 files changed, 11 insertions(+), 1,040 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/22805/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">diff --git a/src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl b/src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl<br>deleted file mode 100644<br>index 5e5facb..0000000<br>--- a/src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,66 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org><br>- *<br>- * This program is free software; you can redistribute it and/or<br>- * modify it under the terms of the GNU General Public License as<br>- * published by the Free Software Foundation; version 2 of<br>- * the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for the<br>- * i945<br>- */<br>-<br>-<br>-// PCI Interrupt Routing<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- Package() { 0x0001FFFF, 0, 0, 0x10 },<br>- Package() { 0x0002FFFF, 0, 0, 0x10 },<br>- Package() { 0x0007FFFF, 0, 0, 0x10 },<br>- Package() { 0x001BFFFF, 0, 0, 0x16 },<br>- Package() { 0x001CFFFF, 0, 0, 0x11 },<br>- Package() { 0x001CFFFF, 1, 0, 0x10 },<br>- Package() { 0x001CFFFF, 2, 0, 0x12 },<br>- Package() { 0x001CFFFF, 3, 0, 0x13 },<br>- Package() { 0x001DFFFF, 0, 0, 0x15 },<br>- Package() { 0x001DFFFF, 1, 0, 0x13 },<br>- Package() { 0x001DFFFF, 2, 0, 0x12 },<br>- Package() { 0x001DFFFF, 3, 0, 0x10 },<br>- Package() { 0x001EFFFF, 0, 0, 0x16 },<br>- Package() { 0x001EFFFF, 1, 0, 0x14 },<br>- Package() { 0x001FFFFF, 0, 0, 0x12 },<br>- Package() { 0x001FFFFF, 1, 0, 0x13 },<br>- Package() { 0x001FFFFF, 3, 0, 0x10 }<br>- })<br>- } Else {<br>- Return (Package() {<br>- Package() { 0x0001FFFF, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x0002FFFF, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x0007FFFF, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001BFFFF, 0, \_SB.PCI0.LPCB.LNKG, 0 },<br>- Package() { 0x001CFFFF, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001CFFFF, 1, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001CFFFF, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001CFFFF, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001DFFFF, 0, \_SB.PCI0.LPCB.LNKH, 0 },<br>- Package() { 0x001DFFFF, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001DFFFF, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001DFFFF, 3, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001EFFFF, 0, \_SB.PCI0.LPCB.LNKG, 0 },<br>- Package() { 0x001EFFFF, 1, \_SB.PCI0.LPCB.LNKE, 0 },<br>- Package() { 0x001FFFFF, 0, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001FFFFF, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001FFFFF, 3, \_SB.PCI0.LPCB.LNKA, 0 }<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/apple/macbook21/romstage.c b/src/mainboard/apple/macbook21/romstage.c<br>index 92dfe74..ed971ae 100644<br>--- a/src/mainboard/apple/macbook21/romstage.c<br>+++ b/src/mainboard/apple/macbook21/romstage.c<br>@@ -167,13 +167,6 @@<br> /* HD Audio Interrupt */<br> RCBA32(0x3110) = 0x00000001;<br> <br>- /* dev irq route register */<br>- RCBA16(0x3140) = 0x0232;<br>- RCBA16(0x3142) = 0x3246;<br>- RCBA16(0x3144) = 0x0235;<br>- RCBA16(0x3146) = 0x3201;<br>- RCBA16(0x3148) = 0x3216;<br>-<br> /* Enable IOAPIC */<br> RCBA8(0x31ff) = 0x03;<br> <br>diff --git a/src/mainboard/asrock/g41c-gs/romstage.c b/src/mainboard/asrock/g41c-gs/romstage.c<br>index dd885db..8645b9c 100644<br>--- a/src/mainboard/asrock/g41c-gs/romstage.c<br>+++ b/src/mainboard/asrock/g41c-gs/romstage.c<br>@@ -53,10 +53,6 @@<br> <br> nuvoton_pnp_exit_conf_state(SERIAL_DEV);<br> <br>- /* IRQ routing */<br>- RCBA16(D31IR) = 0x0132;<br>- RCBA16(D29IR) = 0x0237;<br>-<br> /* Enable IOAPIC */<br> RCBA8(0x31ff) = 0x03;<br> RCBA8(0x31ff);<br>diff --git a/src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl b/src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl<br>deleted file mode 100644<br>index 4aaa33f..0000000<br>--- a/src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,75 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2007-2009 coresystems GmbH<br>- *<br>- * This program is free software; you can redistribute it and/or<br>- * modify it under the terms of the GNU General Public License as<br>- * published by the Free Software Foundation; version 2 of the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for the<br>- * i945<br>- */<br>-<br>-<br>-// PCI Interrupt Routing<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- // PCIe Graphics 0:1.0<br>- Package() { 0x0001ffff, 0, 0, 16 },<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, 0, 16 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, 0, 16 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, 0, 16 },<br>- Package() { 0x001cffff, 1, 0, 17 },<br>- Package() { 0x001cffff, 2, 0, 18 },<br>- Package() { 0x001cffff, 3, 0, 19 },<br>- // USB and EHCI 0:1d.x<br>- Package() { 0x001dffff, 0, 0, 16 },<br>- Package() { 0x001dffff, 1, 0, 17 },<br>- Package() { 0x001dffff, 2, 0, 18 },<br>- Package() { 0x001dffff, 3, 0, 19 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, 0, 16 },<br>- Package() { 0x001fffff, 1, 0, 17 },<br>- Package() { 0x001fffff, 2, 0, 18 },<br>- Package() { 0x001fffff, 3, 0, 19 },<br>-<br>- })<br>-<br>- } Else {<br>- Return (Package() {<br>- // PCIe Graphics 0:1.0<br>- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // USB and EHCI 0:1d.x<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/foxconn/g41s-k/acpi/x4x_pci_irqs.asl b/src/mainboard/foxconn/g41s-k/acpi/x4x_pci_irqs.asl<br>deleted file mode 100644<br>index 8c8afcb..0000000<br>--- a/src/mainboard/foxconn/g41s-k/acpi/x4x_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,79 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz><br>- * Copyright (C) 2017 Samuel Holland <samuel@sholland.org><br>- *<br>- * This program is free software; you can redistribute it and/or modify<br>- * it under the terms of the GNU General Public License as published by<br>- * the Free Software Foundation; version 2 of the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for x4x */<br>-<br>-/* PCI Interrupt Routing */<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- /* PEG 0:01.0 */<br>- Package() { 0x0001ffff, 0, 0, 0x10 },<br>- Package() { 0x0001ffff, 1, 0, 0x11 },<br>- Package() { 0x0001ffff, 2, 0, 0x12 },<br>- Package() { 0x0001ffff, 3, 0, 0x13 },<br>- /* Internal GFX 0:02.0 */<br>- Package() { 0x0002ffff, 0, 0, 0x10 },<br>- /* High Definition Audio 0:1b.0 */<br>- Package() { 0x001bffff, 0, 0, 0x10 },<br>- /* PCIe Root Ports 0:1c.x */<br>- Package() { 0x001cffff, 0, 0, 0x10 },<br>- Package() { 0x001cffff, 1, 0, 0x11 },<br>- Package() { 0x001cffff, 2, 0, 0x12 },<br>- Package() { 0x001cffff, 3, 0, 0x13 },<br>- /* USB and EHCI 0:1d.x */<br>- Package() { 0x001dffff, 0, 0, 0x17 },<br>- Package() { 0x001dffff, 1, 0, 0x13 },<br>- Package() { 0x001dffff, 2, 0, 0x12 },<br>- Package() { 0x001dffff, 3, 0, 0x10 },<br>- /* PCI Bridge 0x1e.0 */<br>- Package() { 0x001effff, 0, 0, 0x11 },<br>- Package() { 0x001effff, 1, 0, 0x14 },<br>- /* PATA/SATA/SMBUS 0:1f.x */<br>- Package() { 0x001fffff, 0, 0, 0x12 },<br>- Package() { 0x001fffff, 1, 0, 0x13 },<br>- })<br>- } Else {<br>- Return (Package() {<br>- /* PEG 0:01.0 */<br>- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- /* Internal GFX 0:02.0 */<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- /* High Definition Audio 0:1b.0 */<br>- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- /* PCIe Root Ports 0:1c.x */<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- /* USB and EHCI 0:1d.x */<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },<br>- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },<br>- /* PCI Bridge 0x1e.0 */<br>- Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 },<br>- /* PATA/SATA/SMBUS 0:1f.x */<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/foxconn/g41s-k/romstage.c b/src/mainboard/foxconn/g41s-k/romstage.c<br>index 2a704a3..cfd5356 100644<br>--- a/src/mainboard/foxconn/g41s-k/romstage.c<br>+++ b/src/mainboard/foxconn/g41s-k/romstage.c<br>@@ -57,11 +57,6 @@<br> ite_reg_write(GPIO_DEV, 0xf6, 0x12);<br> ite_enable_3vsbsw(GPIO_DEV);<br> <br>- /* Set up IRQ routing. */<br>- RCBA16(D31IR) = 0x0132;<br>- RCBA16(D30IR) = 0x3241;<br>- RCBA16(D29IR) = 0x0237;<br>-<br> /* Enable IOAPIC. */<br> RCBA8(OIC) = 0x03;<br> RCBA8(OIC);<br>diff --git a/src/mainboard/getac/p470/acpi/i945_pci_irqs.asl b/src/mainboard/getac/p470/acpi/i945_pci_irqs.asl<br>deleted file mode 100644<br>index 5bbf144..0000000<br>--- a/src/mainboard/getac/p470/acpi/i945_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,82 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2007-2009 coresystems GmbH<br>- *<br>- * This program is free software; you can redistribute it and/or<br>- * modify it under the terms of the GNU General Public License as<br>- * published by the Free Software Foundation; version 2 of<br>- * the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for the<br>- * i945<br>- */<br>-<br>-<br>-// PCI Interrupt Routing<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- // PCIe Graphics 0:1.0<br>- Package() { 0x0001ffff, 0, 0, 16 },<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, 0, 16 },<br>- // Network<br>- Package() { 0x0007ffff, 0, 0, 16 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, 0, 22 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, 0, 17 },<br>- Package() { 0x001cffff, 1, 0, 16 },<br>- Package() { 0x001cffff, 2, 0, 18 },<br>- Package() { 0x001cffff, 3, 0, 19 },<br>- // USB and EHCI 0:1d.x<br>- Package() { 0x001dffff, 0, 0, 23 },<br>- Package() { 0x001dffff, 1, 0, 19 },<br>- Package() { 0x001dffff, 2, 0, 18 },<br>- Package() { 0x001dffff, 3, 0, 16 },<br>- // AC97 0:1e.2, 0:1e.3<br>- Package() { 0x001effff, 0, 0, 22 },<br>- Package() { 0x001effff, 1, 0, 20 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, 0, 18 },<br>- Package() { 0x001fffff, 1, 0, 19 },<br>- Package() { 0x001fffff, 3, 0, 16 }<br>- })<br>- } Else {<br>- Return (Package() {<br>- // PCIe Graphics 0:1.0<br>- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // Network 0:7.0<br>- Package() { 0x0007ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // USB and EHCI 0:1d.x<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },<br>- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // AC97 0:1e.2, 0:1e.3<br>- Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKG, 0 },<br>- Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 }<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c<br>index d1552a6..30a890f 100644<br>--- a/src/mainboard/getac/p470/romstage.c<br>+++ b/src/mainboard/getac/p470/romstage.c<br>@@ -154,13 +154,6 @@<br> /* Device 1d interrupt pin register */<br> RCBA32(0x310c) = 0x00214321;<br> <br>- /* dev irq route register */<br>- RCBA16(0x3140) = 0x0232;<br>- RCBA16(0x3142) = 0x3246;<br>- RCBA16(0x3144) = 0x0237;<br>- RCBA16(0x3146) = 0x3201;<br>- RCBA16(0x3148) = 0x3216;<br>-<br> /* Enable IOAPIC */<br> RCBA8(0x31ff) = 0x03;<br> <br>diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/i945_pci_irqs.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/i945_pci_irqs.asl<br>deleted file mode 100644<br>index 4aaa33f..0000000<br>--- a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/i945_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,75 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2007-2009 coresystems GmbH<br>- *<br>- * This program is free software; you can redistribute it and/or<br>- * modify it under the terms of the GNU General Public License as<br>- * published by the Free Software Foundation; version 2 of the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for the<br>- * i945<br>- */<br>-<br>-<br>-// PCI Interrupt Routing<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- // PCIe Graphics 0:1.0<br>- Package() { 0x0001ffff, 0, 0, 16 },<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, 0, 16 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, 0, 16 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, 0, 16 },<br>- Package() { 0x001cffff, 1, 0, 17 },<br>- Package() { 0x001cffff, 2, 0, 18 },<br>- Package() { 0x001cffff, 3, 0, 19 },<br>- // USB and EHCI 0:1d.x<br>- Package() { 0x001dffff, 0, 0, 16 },<br>- Package() { 0x001dffff, 1, 0, 17 },<br>- Package() { 0x001dffff, 2, 0, 18 },<br>- Package() { 0x001dffff, 3, 0, 19 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, 0, 16 },<br>- Package() { 0x001fffff, 1, 0, 17 },<br>- Package() { 0x001fffff, 2, 0, 18 },<br>- Package() { 0x001fffff, 3, 0, 19 },<br>-<br>- })<br>-<br>- } Else {<br>- Return (Package() {<br>- // PCIe Graphics 0:1.0<br>- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // USB and EHCI 0:1d.x<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/acpi/x4x_pci_irqs.asl b/src/mainboard/gigabyte/ga-g41m-es2l/acpi/x4x_pci_irqs.asl<br>deleted file mode 100644<br>index 46e8a4a..0000000<br>--- a/src/mainboard/gigabyte/ga-g41m-es2l/acpi/x4x_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,72 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2015 Damien Zammit <damien@zamaudio.com><br>- *<br>- * This program is free software; you can redistribute it and/or modify<br>- * it under the terms of the GNU General Public License as published by<br>- * the Free Software Foundation; version 2 of the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for x4x */<br>-<br>-/* PCI Interrupt Routing */<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- /* PEG */<br>- Package() { 0x0001ffff, 0, 0, 16 },<br>- /* Internal GFX */<br>- Package() { 0x0002ffff, 0, 0, 16 },<br>- /* High Definition Audio 0:1b.0 */<br>- Package() { 0x001bffff, 0, 0, 16 },<br>- /* PCIe Root Ports 0:1c.x */<br>- Package() { 0x001cffff, 0, 0, 16 },<br>- Package() { 0x001cffff, 1, 0, 17 },<br>- Package() { 0x001cffff, 2, 0, 18 },<br>- Package() { 0x001cffff, 3, 0, 19 },<br>- Package() { 0x001cffff, 0, 0, 16 },<br>- Package() { 0x001cffff, 1, 0, 17 },<br>- /* USB and EHCI 0:1d.x */<br>- Package() { 0x001dffff, 0, 0, 23 },<br>- Package() { 0x001dffff, 1, 0, 19 },<br>- Package() { 0x001dffff, 2, 0, 18 },<br>- Package() { 0x001dffff, 3, 0, 16 },<br>- /* SMBUS/SATA/PATA 0:1f.2, 0:1f.3 */<br>- Package() { 0x001fffff, 0, 0, 18 },<br>- Package() { 0x001fffff, 1, 0, 19 },<br>- Package() { 0x001fffff, 1, 0, 19 },<br>- })<br>- } Else {<br>- Return (Package() {<br>- /* PEG */<br>- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- /* Internal GFX */<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- /* High Definition Audio 0:1b.0 */<br>- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- /* PCIe Root Ports 0:1c.x */<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },<br>- /* USB and EHCI 0:1d.x */<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },<br>- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },<br>- /* SMBUS/SATA/PATA 0:1f.2, 0:1f.3 */<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c<br>index 67d3eb1..e0e99af 100644<br>--- a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c<br>+++ b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c<br>@@ -94,9 +94,6 @@<br> RCBA32(0x3108) = 0x10004321;<br> RCBA32(0x310c) = 0x00214321;<br> RCBA32(0x3110) = 0x00000001;<br>- RCBA32(0x3140) = 0x00410032;<br>- RCBA32(0x3144) = 0x32100237;<br>- RCBA32(0x3148) = 0x00000000;<br> <br> /* Enable IOAPIC */<br> RCBA8(0x31ff) = 0x03;<br>diff --git a/src/mainboard/ibase/mb899/acpi/i945_pci_irqs.asl b/src/mainboard/ibase/mb899/acpi/i945_pci_irqs.asl<br>deleted file mode 100644<br>index 0db7bc7..0000000<br>--- a/src/mainboard/ibase/mb899/acpi/i945_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,81 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2007-2009 coresystems GmbH<br>- *<br>- * This program is free software; you can redistribute it and/or modify<br>- * it under the terms of the GNU General Public License as published by<br>- * the Free Software Foundation; version 2 of the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for the<br>- * i945<br>- */<br>-<br>-<br>-// PCI Interrupt Routing<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- // PCIe Graphics 0:1.0<br>- Package() { 0x0001ffff, 0, 0, 16 },<br>- Package() { 0x0001ffff, 1, 0, 17 },<br>- Package() { 0x0001ffff, 2, 0, 18 },<br>- Package() { 0x0001ffff, 3, 0, 19 },<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, 0, 16 },<br>- // High Definition Audio 0:1b.0<br>- //Package() { 0x001bffff, 0, 0, 16 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, 0, 16 },<br>- Package() { 0x001cffff, 1, 0, 17 },<br>- Package() { 0x001cffff, 2, 0, 18 },<br>- Package() { 0x001cffff, 3, 0, 19 },<br>- // USB and EHCI 0:1d.x<br>- Package() { 0x001dffff, 0, 0, 23 },<br>- Package() { 0x001dffff, 1, 0, 19 },<br>- Package() { 0x001dffff, 2, 0, 18 },<br>- Package() { 0x001dffff, 3, 0, 16 },<br>- // AC97/IDE 0:1e.2, 0:1e.3<br>- Package() { 0x001effff, 0, 0, 17 },<br>- Package() { 0x001effff, 1, 0, 20 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, 0, 18 },<br>- Package() { 0x001fffff, 1, 0, 19},<br>- })<br>- } Else {<br>- Return (Package() {<br>- // PCIe Graphics 0:1.0<br>- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // High Definition Audio 0:1b.0<br>- //Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // USB and EHCI 0:1d.x<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },<br>- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // AC97/IDE 0:1e.2, 0:1e.3<br>- Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/romstage.c<br>index 43c5677..838796a 100644<br>--- a/src/mainboard/ibase/mb899/romstage.c<br>+++ b/src/mainboard/ibase/mb899/romstage.c<br>@@ -135,13 +135,6 @@<br> /* Device 1d interrupt pin register */<br> RCBA32(0x310c) = 0x00214321;<br> <br>- /* dev irq route register */<br>- RCBA16(0x3140) = 0x0132;<br>- RCBA16(0x3142) = 0x0146;<br>- RCBA16(0x3144) = 0x0237;<br>- RCBA16(0x3146) = 0x3201;<br>- RCBA16(0x3148) = 0x0146;<br>-<br> /* Enable IOAPIC */<br> RCBA8(0x31ff) = 0x03;<br> <br>diff --git a/src/mainboard/intel/d510mo/acpi/pineview_pci_irqs.asl b/src/mainboard/intel/d510mo/acpi/pineview_pci_irqs.asl<br>deleted file mode 100644<br>index 3fa6fdb..0000000<br>--- a/src/mainboard/intel/d510mo/acpi/pineview_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,72 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2007-2009 coresystems GmbH<br>- * Copyright (C) 2015 Damien Zammit <damien@zamaudio.com><br>- *<br>- * This program is free software; you can redistribute it and/or modify<br>- * it under the terms of the GNU General Public License as published by<br>- * the Free Software Foundation; version 2 of the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for pineview */<br>-/* FIXME: EHCI controller not working yet */<br>-<br>-/* PCI Interrupt Routing */<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- /* Internal GFX */<br>- Package() { 0x0002ffff, 0, 0, 16 },<br>- /* High Definition Audio 0:1b.0 */<br>- Package() { 0x001bffff, 0, 0, 22 },<br>- /* PCIe Root Ports 0:1c.x */<br>- Package() { 0x001cffff, 0, 0, 17 },<br>- Package() { 0x001cffff, 1, 0, 16 },<br>- Package() { 0x001cffff, 2, 0, 18 },<br>- Package() { 0x001cffff, 3, 0, 19 },<br>- /* USB and EHCI 0:1d.x */<br>- Package() { 0x001dffff, 0, 0, 23 },<br>- Package() { 0x001dffff, 1, 0, 19 },<br>- Package() { 0x001dffff, 2, 0, 18 },<br>- Package() { 0x001dffff, 3, 0, 16 },<br>- Package() { 0x001dffff, 0, 0, 23 },<br>- /* PCI 0:1e.0 */<br>- Package() { 0x001effff, 0, 0, 22 },<br>- /* LPC/SATA/SMBUS 0:1f.2, 0:1f.3 */<br>- Package() { 0x001fffff, 1, 0, 19 },<br>- Package() { 0x001fffff, 1, 0, 19 },<br>- Package() { 0x001fffff, 1, 0, 19 },<br>- })<br>- } Else {<br>- Return (Package() {<br>- /* Internal GFX */<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- /* High Definition Audio 0:1b.0 */<br>- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },<br>- /* PCIe Root Ports 0:1c.x */<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- /* USB and EHCI 0:1d.x */<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },<br>- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },<br>- /* PCI 0:1e.0 */<br>- Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKG, 0 },<br>- /* LPC/SATA/SMBUS 0:1f.2, 0:1f.3 */<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/intel/d510mo/romstage.c b/src/mainboard/intel/d510mo/romstage.c<br>index c6406e6..10252ae 100644<br>--- a/src/mainboard/intel/d510mo/romstage.c<br>+++ b/src/mainboard/intel/d510mo/romstage.c<br>@@ -85,13 +85,6 @@<br> /* HD Audio Interrupt */<br> RCBA32(0x3110) = 0x00000001;<br> <br>- /* dev irq route register */<br>- RCBA16(0x3140) = 0x0132;<br>- RCBA16(0x3142) = 0x0146;<br>- RCBA16(0x3144) = 0x0237;<br>- RCBA16(0x3146) = 0x3201;<br>- RCBA16(0x3148) = 0x0146;<br>-<br> /* Enable IOAPIC */<br> RCBA8(0x31ff) = 0x03;<br> <br>diff --git a/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl b/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl<br>deleted file mode 100644<br>index a7fcc85..0000000<br>--- a/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,81 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2007-2009 coresystems GmbH<br>- *<br>- * This program is free software; you can redistribute it and/or<br>- * modify it under the terms of the GNU General Public License as<br>- * published by the Free Software Foundation; version 2 of the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for the<br>- * i945<br>- */<br>-<br>-<br>-// PCI Interrupt Routing<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- // PCIe Graphics 0:1.0<br>- Package() { 0x0001ffff, 0, 0, 16 },<br>- Package() { 0x0001ffff, 1, 0, 17 },<br>- Package() { 0x0001ffff, 2, 0, 18 },<br>- Package() { 0x0001ffff, 3, 0, 19 },<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, 0, 16 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, 0, 22 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, 0, 17 },<br>- Package() { 0x001cffff, 1, 0, 16 },<br>- Package() { 0x001cffff, 2, 0, 18 },<br>- Package() { 0x001cffff, 3, 0, 19 },<br>- // USB and EHCI 0:1d.x<br>- Package() { 0x001dffff, 0, 0, 23 },<br>- Package() { 0x001dffff, 1, 0, 19 },<br>- Package() { 0x001dffff, 2, 0, 18 },<br>- Package() { 0x001dffff, 3, 0, 16 },<br>- // AC97 0:1e.2, 0:1e.3<br>- Package() { 0x001effff, 0, 0, 22 },<br>- Package() { 0x001effff, 1, 0, 20 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, 0, 18 },<br>- Package() { 0x001fffff, 1, 0, 19 },<br>- })<br>- } Else {<br>- Return (Package() {<br>- // PCIe Graphics 0:1.0<br>- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKF, 0 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // USB and EHCI 0:1d.x<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },<br>- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // AC97 0:1e.2, 0:1e.3<br>- Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKG, 0 },<br>- Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c<br>index e769fc5..a52729b 100644<br>--- a/src/mainboard/intel/d945gclf/romstage.c<br>+++ b/src/mainboard/intel/d945gclf/romstage.c<br>@@ -60,13 +60,6 @@<br> /* Device 1d interrupt pin register */<br> RCBA32(0x310c) = 0x00214321;<br> <br>- /* dev irq route register */<br>- RCBA16(0x3140) = 0x0132;<br>- RCBA16(0x3142) = 0x0146;<br>- RCBA16(0x3144) = 0x0237;<br>- RCBA16(0x3146) = 0x3201;<br>- RCBA16(0x3148) = 0x0146;<br>-<br> /* Enable IOAPIC */<br> RCBA8(0x31ff) = 0x03;<br> <br>diff --git a/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl b/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl<br>deleted file mode 100644<br>index efb94c6..0000000<br>--- a/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,81 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2007-2009 coresystems GmbH<br>- *<br>- * This program is free software; you can redistribute it and/or modify<br>- * it under the terms of the GNU General Public License as published by<br>- * the Free Software Foundation; version 2 of the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for the<br>- * i945<br>- */<br>-<br>-<br>-// PCI Interrupt Routing<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- // PCIe Graphics 0:1.0<br>- Package() { 0x0001ffff, 0, 0, 16 },<br>- Package() { 0x0001ffff, 1, 0, 17 },<br>- Package() { 0x0001ffff, 2, 0, 18 },<br>- Package() { 0x0001ffff, 3, 0, 19 },<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, 0, 16 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, 0, 16 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, 0, 16 },<br>- Package() { 0x001cffff, 1, 0, 17 },<br>- Package() { 0x001cffff, 2, 0, 18 },<br>- Package() { 0x001cffff, 3, 0, 19 },<br>- // USB and EHCI 0:1d.x<br>- Package() { 0x001dffff, 0, 0, 23 },<br>- Package() { 0x001dffff, 1, 0, 19 },<br>- Package() { 0x001dffff, 2, 0, 18 },<br>- Package() { 0x001dffff, 3, 0, 16 },<br>- // AC97/IDE 0:1e.2, 0:1e.3<br>- Package() { 0x001effff, 0, 0, 17 },<br>- Package() { 0x001effff, 1, 0, 20 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, 0, 18 },<br>- Package() { 0x001fffff, 1, 0, 19},<br>- })<br>- } Else {<br>- Return (Package() {<br>- // PCIe Graphics 0:1.0<br>- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // USB and EHCI 0:1d.x<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },<br>- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // AC97/IDE 0:1e.2, 0:1e.3<br>- Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c<br>index 3b3ff66..ba8b1a5 100644<br>--- a/src/mainboard/kontron/986lcd-m/romstage.c<br>+++ b/src/mainboard/kontron/986lcd-m/romstage.c<br>@@ -190,13 +190,6 @@<br> /* Device 1d interrupt pin register */<br> RCBA32(0x310c) = 0x00214321;<br> <br>- /* dev irq route register */<br>- RCBA16(0x3140) = 0x0132;<br>- RCBA16(0x3142) = 0x3241;<br>- RCBA16(0x3144) = 0x0237;<br>- RCBA16(0x3146) = 0x3210;<br>- RCBA16(0x3148) = 0x3210;<br>-<br> /* Enable IOAPIC */<br> RCBA8(0x31ff) = 0x03;<br> <br>diff --git a/src/mainboard/lenovo/t60/acpi/i945_pci_irqs.asl b/src/mainboard/lenovo/t60/acpi/i945_pci_irqs.asl<br>deleted file mode 100644<br>index f0d76db..0000000<br>--- a/src/mainboard/lenovo/t60/acpi/i945_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,58 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org><br>- *<br>- * This program is free software; you can redistribute it and/or<br>- * modify it under the terms of the GNU General Public License as<br>- * published by the Free Software Foundation; version 2 of<br>- * the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for the<br>- * i945<br>- */<br>-<br>-<br>-// PCI Interrupt Routing<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- Package() { 0x0002ffff, 0, 0, 0x10 }, // VGA<br>- Package() { 0x001bffff, 1, 0, 0x11 }, // Audio<br>- Package() { 0x001cffff, 0, 0, 0x14 }, // PCI bridge<br>- Package() { 0x001cffff, 1, 0, 0x15 }, // PCI bridge<br>- Package() { 0x001cffff, 2, 0, 0x16 }, // PCI bridge<br>- Package() { 0x001cffff, 3, 0, 0x17 }, // PCI bridge<br>- Package() { 0x001dffff, 0, 0, 0x10 }, // USB<br>- Package() { 0x001dffff, 1, 0, 0x11 }, // USB<br>- Package() { 0x001dffff, 2, 0, 0x12 }, // USB<br>- Package() { 0x001dffff, 3, 0, 0x13 }, // USB<br>- Package() { 0x001fffff, 0, 0, 0x17 }, // LPC<br>- Package() { 0x001fffff, 1, 0, 0x10 }, // IDE<br>- Package() { 0x001fffff, 2, 0, 0x10 } // SATA<br>- })<br>- } Else {<br>- Return (Package() {<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, // VGA<br>- Package() { 0x001bffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, // Audio<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKE, 0 }, // PCI<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKF, 0 }, // PCI<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKG, 0 }, // PCI<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKH, 0 }, // PCI<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, // USB<br>- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, // USB<br>- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 }, // USB<br>- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKD, 0 }, // USB<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKH, 0 }, // LPC<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKA, 0 }, // IDE<br>- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKA, 0 } // SATA<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c<br>index 80b989f..fe255fd 100644<br>--- a/src/mainboard/lenovo/t60/romstage.c<br>+++ b/src/mainboard/lenovo/t60/romstage.c<br>@@ -91,13 +91,6 @@<br> /* HD Audio Interrupt */<br> RCBA32(0x3110) = 0x00000002;<br> <br>- /* dev irq route register */<br>- RCBA16(0x3140) = 0x1007;<br>- RCBA16(0x3142) = 0x0076;<br>- RCBA16(0x3144) = 0x3210;<br>- RCBA16(0x3146) = 0x7654;<br>- RCBA16(0x3148) = 0x0010;<br>-<br> /* Enable IOAPIC */<br> RCBA8(0x31ff) = 0x03;<br> <br>diff --git a/src/mainboard/lenovo/x60/acpi/i945_pci_irqs.asl b/src/mainboard/lenovo/x60/acpi/i945_pci_irqs.asl<br>deleted file mode 100644<br>index f0d76db..0000000<br>--- a/src/mainboard/lenovo/x60/acpi/i945_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,58 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org><br>- *<br>- * This program is free software; you can redistribute it and/or<br>- * modify it under the terms of the GNU General Public License as<br>- * published by the Free Software Foundation; version 2 of<br>- * the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for the<br>- * i945<br>- */<br>-<br>-<br>-// PCI Interrupt Routing<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- Package() { 0x0002ffff, 0, 0, 0x10 }, // VGA<br>- Package() { 0x001bffff, 1, 0, 0x11 }, // Audio<br>- Package() { 0x001cffff, 0, 0, 0x14 }, // PCI bridge<br>- Package() { 0x001cffff, 1, 0, 0x15 }, // PCI bridge<br>- Package() { 0x001cffff, 2, 0, 0x16 }, // PCI bridge<br>- Package() { 0x001cffff, 3, 0, 0x17 }, // PCI bridge<br>- Package() { 0x001dffff, 0, 0, 0x10 }, // USB<br>- Package() { 0x001dffff, 1, 0, 0x11 }, // USB<br>- Package() { 0x001dffff, 2, 0, 0x12 }, // USB<br>- Package() { 0x001dffff, 3, 0, 0x13 }, // USB<br>- Package() { 0x001fffff, 0, 0, 0x17 }, // LPC<br>- Package() { 0x001fffff, 1, 0, 0x10 }, // IDE<br>- Package() { 0x001fffff, 2, 0, 0x10 } // SATA<br>- })<br>- } Else {<br>- Return (Package() {<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, // VGA<br>- Package() { 0x001bffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, // Audio<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKE, 0 }, // PCI<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKF, 0 }, // PCI<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKG, 0 }, // PCI<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKH, 0 }, // PCI<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, // USB<br>- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, // USB<br>- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 }, // USB<br>- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKD, 0 }, // USB<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKH, 0 }, // LPC<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKA, 0 }, // IDE<br>- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKA, 0 } // SATA<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c<br>index eddb150..50136f2 100644<br>--- a/src/mainboard/lenovo/x60/romstage.c<br>+++ b/src/mainboard/lenovo/x60/romstage.c<br>@@ -91,13 +91,6 @@<br> /* HD Audio Interrupt */<br> RCBA32(0x3110) = 0x00000002;<br> <br>- /* dev irq route register */<br>- RCBA16(0x3140) = 0x1007;<br>- RCBA16(0x3142) = 0x0076;<br>- RCBA16(0x3144) = 0x3210;<br>- RCBA16(0x3146) = 0x7654;<br>- RCBA16(0x3148) = 0x0010;<br>-<br> /* Enable IOAPIC */<br> RCBA8(0x31ff) = 0x03;<br> <br>diff --git a/src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl b/src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl<br>deleted file mode 100644<br>index a7d999e..0000000<br>--- a/src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl<br>+++ /dev/null<br>@@ -1,79 +0,0 @@<br>-/*<br>- * This file is part of the coreboot project.<br>- *<br>- * Copyright (C) 2007-2009 coresystems GmbH<br>- *<br>- * This program is free software; you can redistribute it and/or<br>- * modify it under the terms of the GNU General Public License as<br>- * published by the Free Software Foundation; version 2 of<br>- * the License.<br>- *<br>- * This program is distributed in the hope that it will be useful,<br>- * but WITHOUT ANY WARRANTY; without even the implied warranty of<br>- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the<br>- * GNU General Public License for more details.<br>- */<br>-<br>-/* This is board specific information: IRQ routing for the<br>- * i945<br>- */<br>-<br>-<br>-// PCI Interrupt Routing<br>-Method(_PRT)<br>-{<br>- If (PICM) {<br>- Return (Package() {<br>- // PCIe Graphics 0:1.0<br>- Package() { 0x0001ffff, 0, 0, 16 },<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, 0, 16 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, 0, 22 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, 0, 17 },<br>- Package() { 0x001cffff, 1, 0, 16 },<br>- Package() { 0x001cffff, 2, 0, 18 },<br>- Package() { 0x001cffff, 3, 0, 19 },<br>- // USB and EHCI 0:1d.x<br>- Package() { 0x001dffff, 0, 0, 23 },<br>- Package() { 0x001dffff, 1, 0, 19 },<br>- Package() { 0x001dffff, 2, 0, 18 },<br>- Package() { 0x001dffff, 3, 0, 16 },<br>- // AC97 0:1e.2, 0:1e.3<br>- Package() { 0x001effff, 0, 0, 22 },<br>- Package() { 0x001effff, 1, 0, 20 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, 0, 18 },<br>- Package() { 0x001fffff, 1, 0, 19 },<br>- Package() { 0x001fffff, 1, 0, 20 },<br>- Package() { 0x001fffff, 3, 0, 16 }<br>- })<br>- } Else {<br>- Return (Package() {<br>- // PCIe Graphics 0:1.0<br>- Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // Onboard graphics (IGD) 0:2.0<br>- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // High Definition Audio 0:1b.0<br>- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },<br>- // PCIe Root Ports 0:1c.x<br>- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },<br>- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKA, 0 },<br>- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },<br>- // USB and EHCI 0:1d.x<br>- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },<br>- Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },<br>- // AC97 0:1e.2, 0:1e.3<br>- Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKG, 0 },<br>- Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 },<br>- // LPC device 0:1f.0<br>- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },<br>- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },<br>- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 }<br>- })<br>- }<br>-}<br>diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c<br>index a488488..20e51db 100644<br>--- a/src/mainboard/roda/rk886ex/romstage.c<br>+++ b/src/mainboard/roda/rk886ex/romstage.c<br>@@ -125,13 +125,6 @@<br> /* Device 1d interrupt pin register */<br> RCBA32(0x310c) = 0x00214321;<br> <br>- /* dev irq route register */<br>- RCBA16(0x3140) = 0x0232;<br>- RCBA16(0x3142) = 0x3246;<br>- RCBA16(0x3144) = 0x0237;<br>- RCBA16(0x3146) = 0x3201;<br>- RCBA16(0x3148) = 0x3216;<br>-<br> /* Enable IOAPIC */<br> RCBA8(0x31ff) = 0x03;<br> <br>diff --git a/src/northbridge/intel/i945/acpi/hostbridge.asl b/src/northbridge/intel/i945/acpi/hostbridge.asl<br>index 5877b0e..7b3917d 100644<br>--- a/src/northbridge/intel/i945/acpi/hostbridge.asl<br>+++ b/src/northbridge/intel/i945/acpi/hostbridge.asl<br>@@ -228,6 +228,3 @@<br> <br> Return (MCRS)<br> }<br>-<br>-/* IRQ assignment is mainboard specific. Get it from mainboard ACPI code */<br>-#include "acpi/i945_pci_irqs.asl"<br>diff --git a/src/northbridge/intel/pineview/acpi/hostbridge.asl b/src/northbridge/intel/pineview/acpi/hostbridge.asl<br>index d759514..3eff101 100644<br>--- a/src/northbridge/intel/pineview/acpi/hostbridge.asl<br>+++ b/src/northbridge/intel/pineview/acpi/hostbridge.asl<br>@@ -230,6 +230,3 @@<br> <br> Return (MCRS)<br> }<br>-<br>-/* IRQ assignment is mainboard specific. Get it from mainboard ACPI code */<br>-#include "acpi/pineview_pci_irqs.asl"<br>diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig<br>index fd7579a..03e8923 100644<br>--- a/src/southbridge/intel/i82801gx/Kconfig<br>+++ b/src/southbridge/intel/i82801gx/Kconfig<br>@@ -26,6 +26,7 @@<br> select SPI_FLASH<br> select SOUTHBRIDGE_INTEL_COMMON_GPIO<br> select SOUTHBRIDGE_INTEL_COMMON_SMBUS<br>+ select SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN<br> <br> if SOUTHBRIDGE_INTEL_I82801GX<br> <br>diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c<br>index a26b9f8..9da8507 100644<br>--- a/src/southbridge/intel/i82801gx/lpc.c<br>+++ b/src/southbridge/intel/i82801gx/lpc.c<br>@@ -32,6 +32,7 @@<br> #include <cbmem.h><br> #include <string.h><br> #include <drivers/intel/gma/i915.h><br>+#include <southbridge/intel/common/acpi_pirq_gen.h><br> #include "nvs.h"<br> <br> #define NMI_OFF 0<br>@@ -684,6 +685,14 @@<br> }<br> }<br> <br>+static void southbridge_fill_ssdt(device_t device)<br>+{<br>+ /*<br>+ * Generates PIRQ ACPI table with assumption DxxIR are at<br>+ * reset default. */<br>+ gen_def_acpi_pirq();<br>+}<br>+<br> static struct pci_operations pci_ops = {<br> .set_subsystem = set_subsystem,<br> };<br>@@ -694,6 +703,7 @@<br> .enable_resources = pci_dev_enable_resources,<br> .acpi_inject_dsdt_generator = southbridge_inject_dsdt,<br> .write_acpi_tables = acpi_write_hpet,<br>+ .acpi_fill_ssdt_generator = southbridge_fill_ssdt,<br> .init = lpc_init,<br> .scan_bus = scan_lpc_bus,<br> .enable = i82801gx_enable,<br></pre><p>To view, visit <a href="https://review.coreboot.org/22805">change 22805</a>. To unsubscribe, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/22805"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I456dca61419be9f2efd06fa966343a4b5ad6d5c6 </div>
<div style="display:none"> Gerrit-Change-Number: 22805 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>